M306V5ME-XXXSP Datasheet, PDF (52/263 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
M306V5EESP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
________
Reset > DBC > Watchdog timer > Peripheral I/O > Single step > Address match
Figure 2.7.8 Hardware interrupts priorities
Priority level of each interrupt
INT1
Timer B2
Timer B0
Timer A3
Timer A1
OSD1
INT0
Timer B1
Timer A4
Timer A2
VSYNC
UART0 reception
UART2 reception
A-D conversion
DMA1
Bus collision detection
OSD2
Timer A0
Data slicer
UART0 transmission
UART2 transmission
Multi-master I²C-BUS interface 0
DMA0
Multi-master I²C-BUS interface 1
Processor interrupt priority level (IPL)
Level 0 (initial value)
High
Priority of peripheral I/O interrupts
(if priority levels are same)
Low
Interrupt enable flag (I flag)
Address match
Watchdog timer
DBC
Reset
Figure 2.7.9 Maskable interrupts priorities (peripheral I/O interrupts)
Interrupt request accepted
Rev. 1.0
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