M306V5ME-XXXSP Datasheet, PDF (260/263 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
M306V5EESP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
------Register Index------
[A]
A-D conversion interrupt control register (ADIC)
...................................................................... 43
Address match interrupt enable register (AIER)
...................................................................... 53
Address match interrupt register i (RMADi) .. 53
A-D register i (ADi) ...................................... 141
A-D control register 2 (ADCON2) ................ 141
A-D control register 1 (ADCON1) ......................
............................ 140, 143, 145, 147, 149, 150
A-D control register 0 (ADCON0)
............................ 140, 143, 145, 147, 149, 151
[B]
Block control register i (BCi) ....................... 171
Bottom border control register (BBR) .......... 215
Bus collision detection interrupt control register
(BCNIC) ....................................................... 43
[C]
Caption data register i (CDi) ......................... 13
Caption position register (CPS) .................. 161
Clock control register (CS) .......................... 179
Clock run-in detect register (CRD) .............. 162
Color palette register i (CRi) ....................... 119
Count start flag (TABSR) ........................ 71, 81
[D]
D-A control register (DACON) ..................... 154
D-A register i (DAi) ...................................... 154
Data clock position register (DPS) .............. 163
Data slicer control register 1 (DSC1) .......... 157
Data slicer control register 2 (DSC2) .......... 157
Data slicer interrupt control register (DSIC) .. 43
Data slicer reserved register i (DRi) ............ 164
DMA0 request cause select register (DM0SL)
...................................................................... 60
DMA1 request cause select register (DM1SL) ..
...................................................................... 61
DMAi control register (DMiCON) ................... 61
DMAi interrupt control register (DMiIC) ......... 43
DMAi destination pointer (DARi) ................... 62
DMAi transfer counter (TCRi) ....................... 62
DMAi source pointer (SARi) .......................... 62
[H]
Horizontal position register (HP) ................. 176
HSYNC counter register (HC) ....................... 165
HSYNC counter latch ...................................... 13
[I]
I²Ci data shift register (IICiS0) .................... 123
I²Ci address register (IICiS0D) ................... 124
I²Ci status register (IICiS1) ......................... 131
I²Ci control register (IICiS1D) ..................... 128
I²Ci clock control register (IICiS2) ............... 126
I²Ci port selection register (IICiS2D) ........... 121
I²Ci transmit buffer register (IICiS0S) ......... 123
I/O polarity control register (PC) ................. 180
Interrupt control reserved register i (REiIC) ......... 52
Interrupt request cause select register (IFSR)
...................................................................... 52
INTi interrupt control register (INTiIC) ........... 43
[L]
Left border control register (LBR) ............... 216
[M]
Multi-master I²C-BUS interface i interrupt
control register (IICiIC) .................................. 43
[O]
One-shot start flag (ONSF) ........................... 72
OSD control register 1 (OC1) ...................... 170
OSD control register 2 (OC2) ...................... 173
OSD control register 3 (OC3) ...................... 198
OSD control register 4 (OC4) ...................... 182
OSD reserved register i (ORi) ..................... 220
OSDi interrupt control register (OSDiIC) ........ 43
[P]
Peripheral mode register (PM) ...................... 87
Rev. 1.0
259