M306V5ME-XXXSP Datasheet, PDF (26/263 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
M306V5EESP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
2.4.1 Software Wait
A software wait can be inserted by setting the wait bit (bit 7) of processor mode register 1 (address
000516).
A software wait is inserted in the internal ROM/RAM area by setting the wait bit of the processor mode
register 1. When set to “0”, each bus cycle is executed in one BCLK cycle. When set to “1”, each bus cycle
is executed in two BCLK cycles. After the microcomputer has been reset, this bit defaults to “0”.
The SFR area and the OSD RAM area is always accessed in two BCLK cycles regardless of the setting
of these control bits.
Table 2.4.1 shows the software wait and bus cycles. Figure 2.4.4 shows example bus timing when using
software waits.
Table 2.4.1 Software waits and bus cycles
Area
SFR/
OSD RAM
Internal
ROM/RAM
Wait bit
Invalid
0
1
Bus cycle
2 BCLK cycles
1 BCLK cycle
2 BCLK cycles
Rev. 1.0
25