M306V5ME-XXXSP Datasheet, PDF (43/263 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
M306V5EESP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
2.7.5 Interrupt Control
Descriptions are given here regarding how to enable or disable maskable interrupts and how to set the
priority to be accepted. What is described here does not apply to non-maskable interrupts.
Enable or disable a non-maskable interrupt using the interrupt enable flag (I flag), interrupt priority level
selection bit, or processor interrupt priority level (IPL). Whether an interrupt request is present or absent
is indicated by the interrupt request bit. The interrupt request bit and the interrupt priority level selection
bit are located in the interrupt control register of each interrupt. Also, the interrupt enable flag (I flag) and
the IPL are located in the flag register (FLG).
Figure 2.7.3 shows the interrupt control registers.
Rev. 1.0
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