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7721 Datasheet, PDF (472/577 Pages) List of Unclassifed Manufacturers – H Bridge Power Module
APPENDIX
Appendix 3. Control registers
Appendix 3. Control registers
The control registers allocated in the SFR area are shown on the following pages.
Below is the structure diagram for all registers.
b7 b6 b5 b4 b3 b2 b1 b0
!0
V1
XXX register (Address XX16)
V2
V3
Bit
Bit name
Functions
0 ... select bit
0 : ...
1 : ...
1 ... select bit
0 : ...
1 : ...
The value is “0” at reading.
2 ... flag
0 : ...
1 : ...
3 Fix this bit to “0.”
4 This bit is invalid in ... mode.
7 to 5 Nothing is assigned.
At reset RW
0 RW
Undefined WO
0 RO
0 RW
0 RW
Undefined –
V1
V4
Blank : Set to “0” or “1” according to the usage.
0
: Set to “0” at writing.
1
: Set to “1” at writing.
!
: Invalid depending on the mode or state. It may be “0” or “1.”
: Nothing is assigned.
V2
0
: “0” immediately after reset.
1
: “1” immediately after reset.
Undefined : Undefined immediately after reset.
V3
RW
: It is possible to read the bit state at reading. The written value becomes valid.
RO
: It is possible to read the bit state at reading. The written value becomes invalid. Accordingly, the written
value may be “0” or “1.”
WO
: The written value becomes valid. It is impossible to read the bit state. The value is undefined at reading.
However, when [“0” is at reading”] is indicated in the “Function” or “Note” column, the bit is always “0” at
reading. (See V4 above.)
—
: It is impossible to read the bit state. The value is undefined at reading.
However, when [“0” is at reading”] is indicated in the “Function” or “Note” column, the bit is always “0” at
reading. (See V4 above.)
The written value becomes invalid. Accordingly, the written value may be “0” or “1.”
7721 Group User’s Manual
17–9