7721 Datasheet, PDF (315/577 Pages) List of Unclassifed Manufacturers – H Bridge Power Module

DMA CONTROLLER
13.4 Operation
Tables 13.4.4 Address directions in 2-bus cycle transfer and examples of transfer result (3)
Address direction
External data bus width : 16 bits or 8 bits
Transfer unit : 16 bits
Transfer unit : 8 bits
Transfer
source
Transfer
destination
Data arrangement
on transfer source
memory
Transfer
sequence
Data arrangement on
transfer destination
memory (transfer result)
Data arrangement
on transfer source
memory
Transfer
sequence
Data arrangement on
transfer destination
memory (transfer result)
Backward Fixed
Low order
Data 3
High order
Low order
Data 2
High order
Low order
Data 1
V High order
Low order
Data
V
1–3
High order
Data 6
Data 5
Data 4
Data 3
Data 2
V ^{Data 1}
Data 1–6 V
Backward Forward
Low order
Data 3
High order
Low order
Data 2
High order
Low order
Data 1
V High order
Backward Backward
Low order
Data 3
High order
Low order
Data 2
High order
Low order
Data 1
V High order
V : Transfer start address
Low order _V
Data 1
High order
Low order
Data 2
High order
Low order
Data 3
High order
Data 6
Data 5
Data 4
Data 3
Data 2
V _{Data 1}
Low order
Data 3
High order
Low order
Data 2
High order
Low order
Data 1
High order V
Data 6
Data 5
Data 4
Data 3
Data 2
V ^{Data 1}
Data 1 _V
Data 2
Data 3
Data 4
Data 5
Data 6
Data 6
Data 5
Data 4
Data 3
Data 2
Data 1 V
13-36
7721 Group User’s Manual