7721 Datasheet, PDF (28/577 Pages) List of Unclassifed Manufacturers – H Bridge Power Module

CENTRAL PROCESSING UNIT (CPU)
2.1 Central processing unit
2.1.5 Program counter (PC)
The program counter is a 16-bit counter that indicates the low-order 16 bits of the address (24 bits) at
which an instruction to be executed next (in other words, an instruction to be read out from an instruction
queue buffer next) is stored. The contents of the high-order program counter (PCH) become “FF16,” and the
low-order program counter (PCL) becomes “FE16” at reset. The contents of the program counter becomes
the contents of the reset’s vector address (addresses FFFE16, FFFF16) immediately after reset.
Figure 2.1.3 shows the program counter and the program bank register.
(b23)
b7
(b16)
b0 b15
PG
PCH
b8 b7
b0
PCL
Fig. 2.1.3 Program counter and program bank register
2.1.6 Program bank register (PG)
The access space is divided in units of 64 Kbytes. This unit is called “bank.” (Refer to section “2.3 Access
space.”)
The program bank register is an 8-bit register. This register indicates the high-order 8 bits (bank) of the
address (24 bits) at which an instruction to be executed next (in other words, an instruction to be read out
from an instruction queue buffer next) is stored. These 8 bits are called bank.
When a carry occurs after adding the contents of the program counter or adding the offset value to the
contents of the program counter in the branch instruction and others, the contents of the program bank
register is automatically incremented by 1. When a borrow occurs after subtracting the contents of the
program counter, the contents of the program bank register is automatically decremented by 1. Accordingly,
there is no need to consider bank boundaries in programming, usually.
This register is cleared to “0016” at reset.
2.1.7 Data bank register (DT)
The data bank register is an 8-bit register. In the following addressing modes using the data bank register,
the contents of this register is used as the high-order 8 bits (bank) of a 24-bit address to be accessed.
Use the LDT instruction to set a value to this register.
This register is cleared to “0016” at reset.
qAddressing modes using data bank register
•Direct indirect
•Direct indexed X indirect
•Direct indirect indexed Y
•Absolute
•Absolute bit
•Absolute indexed X
•Absolute indexed Y
•Absolute bit relative
•Stack pointer relative indirect indexed Y
7721 Group User’s Manual
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