PD46184095B_15 Datasheet, PDF (15/34 Pages) Renesas Technology Corp – 18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION

μPD46184095B, μPD46184185B
Capacitance (TA = 25°C, f = 1 MHz)
Parameter
Symbol Test conditions
Input capacitance
(Address, Control)
C_IN
V_IN = 0 V
Input / Output capacitance
(D, Q, CQ, CQ#)
C_I/O
V_I/O = 0 V
Clock Input capacitance
C_clk
V_clk = 0 V
MIN.
Remark These parameters are periodically sampled and not 100% tested.
Thermal Characteristics
Parameter
Thermal resistance
from junction to ambient air
Symbol
Substrate
θ ja 4-layer
8-layer
Thermal characterization parameter
from junction to the top center
of the package surface
Ψ jt 4-layer
8-layer
Thermal resistance
θ jc
from junction to case
Airflow
0 m/s
1 m/s
0 m/s
1 m/s
0 m/s
1 m/s
0 m/s
1 m/s
MAX.
Unit
5
pF
7
pF
6
pF
TYP.
16.5
13.2
15.5
12.6
0.07
0.13
0.06
0.12
3.86
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
R10DS0115EJ0200 Rev.2.00
Nov 09, 2012
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