PM7375 Datasheet, PDF (118/430 Pages) PMC-Sierra, Inc – ATM SAR and PHY Processor for PCI Bus

DATA SHEET
PMC-931127
ISSUE 6
PM7375 LASAR-155
LOCAL ATM SAR & PHYSICAL LAYER
10.1.2 Register 0x01 (0x004): LASAR-155 Master Configuration
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
AUTOXOFF
TBYP
RBYP
Unused
Unused
Unused
RATE[1]
RATE[0]
UNI_POTS
AUTOFEBE
AUTOLRDI
AUTOPRDI
TFIFOINV
RFIFOINV
RXDINV
STS1
Default
0
0
0
X
X
X
1
1
0
1
1
1
0
0
0
0
STS1:
The STS1 bit configures the LASAR-155 to expect a STS-1 Physical
Transmission Convergence sub layer. When STS1 is set to logic one, the
LASAR-155 is configured for a STS-1 Physical Transmission Convergence sub
layer. When STS1 is set to logic zero, the LASAR-155 is configured for a STS-3c
(STM-1) Physical Transmission Convergence sub layer.
RXDINV:
The RXDINV bit selects the active polarity of the RXD+/- signals. The default
configuration selects RXD+ to be active high and RXD- to be active low. When
RXDINV is set to logic one, RXD+ to be active low and RXD- to be active high.
Polarity invert (RXDINV) is not supported when line loopback (LLE) is enabled (If
LLE = 1 then RXDINV must be set to 0).
RFIFOINV:
The RFIFOINV bit selects the active polarity of the RFIFOEB/RFIFOFB signal.
The default configuration selects RFIFOEB/RFIFOFB to be active low. When
RFIFOINV is set to logic one, the RFIFOEB/RFIFOFB signal becomes active
high. If RXPHYBP is set to logic one, RFIFOINV is not used and should be set
to logic zero.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 102