PM7375 Datasheet, PDF (104/430 Pages) PMC-Sierra, Inc – ATM SAR and PHY Processor for PCI Bus

DATA SHEET
PMC-931127
ISSUE 6
PM7375 LASAR-155
LOCAL ATM SAR & PHYSICAL LAYER
9.14.11.1 Fig. 9.20 RMDRF and RMDRR Queues
Receive Management Descriptor (RMD) Referance Queues
Base Address:
RQB[3 1 :2 ] = Rx Queue B as e r egi s t er
Index Registers:
Management Free Queue:
RMDRFQS [1 5 :0 ] = RMDR Fr ee Queue S t ar t r egi s t er
RMDRFQW[1 5 :0 ] = RMDR F r ee Queue Wr i t e r egi s t er
RMDRFQR[1 5 :0 ] = RMDR Fr ee Queue Read r egi s t er
RMDRFQE[1 5 :0 ] = RMDR Fr ee Queue End r egi s t er
Managemnet Ready Queue:
RMDRRQS [1 5 :0 ] = RMDR Ready Queue S t ar t r egi s t er
RMDRRQW[1 5 :0 ] = RMDR Ready Queue Wr i t e r egi s t er
RMDRRQR[1 5 :0 ] = RMDR Ready Queue Read r egi s t er
RMDRRQE[1 5 :0 ] = RMDR Ready Queue End r egi s t er
Base Address
+ Index Register +
-------------------------
PCI Address
RQB[31:2]
00
Index[15:0]
00
AD[31:0]
Rx Management Des cript or Reference Queue Memory Map
R MDR R QS
R MDR R QR
Bit 31
S t at us + RMDR
S t at us + RMDR
Bi t 0
R MDR R QW
R MDR R QE
R MDR F QS
RMDRF QR
S t at us + RMDR
S t at us + RMDR
S t at us + RMDR
S t at us + RMDR
RMDR
RMDR
RQB
PCI Host Memory
RMD Reference Queues
256KB
R MDR F QW
R MDR F QE
R MDR
R MDR
R MDR
R MDR
Valid RMDR. Only the least
significant 16 bits are
valid.
Each queue element is a sixteen bit structure consisting of a RMDR and several
Status bits. Status bits are used by the RRM to indicate the type of cell passed to
the PCI Host. Please refer below.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 88