74HC7403 Datasheet, PDF (2/28 Pages) NXP Semiconductors – 4-Bit x 64-word FIFO register; 3-state

Philips Semiconductors
4-Bit x 64-word FIFO register; 3-state
Product specification
74HC/HCT7403
FEATURES
• Synchronous or asynchronous
operation
• 3-state outputs
• 30 MHz (typical) shift-in and
shift-out rates
• Readily expandable in word and bit
dimensions
• Pinning arranged for easy board
layout: input pins directly opposite
output pins
• Output capability: driver (8 mA)
• I_CC category: LSI.
APPLICATIONS
• High-speed disc or tape controller
• Communications buffer.
GENERAL DESCRIPTION
The 74HC/HCT7403 are high-speed
Si-gate CMOS devices. They are
specified in compliance with JEDEC
standard no.7A.
The “7403” is an expandable, First-In
First-Out (FIFO) memory organized
as 64 words by 4 bits. A guaranteed
15 MHz data-rate makes it ideal for
high-speed applications. A higher
data-rate can be obtained in
applications where the status flags
are not used (burst-mode).
With separate controls for shift-in (SI)
and shift-out (SO), reading and
writing operations are completely
independent, allowing synchronous
and asynchronous data transfers.
Additional controls include a
master-reset input (MR), an output
enable input (OE) and flags. The
data-in-ready (DIR) and
data-out-ready (DOR) flags indicate
the status of the device.
QUICK REFERENCE DATA
GND = 0 V; T_amb = 25 °C; t_r = t_f = 6 ns.
SYMBOL
PARAMETER
CONDITIONS
t_PHL/t_PLH
f_max
C_I
C_PD
propagation delay SO,
SI to DIR and DOR
maximum clock
frequency
input capacitance
power dissipation
capacitance per
package
C_L = 15 pF;
V_CC = 5 V
note 1
TYP.
UNIT
HC HCT
15 17 ns
30 30 MHz
3.5 3.5 pF
475 490 pF
Note
1. For HC the condition is V_I = GND to V_CC.
For HCT the condition is V_I = GND to V_CC −1.5 V.
ORDERING INFORMATION
EXTENDED
TYPE NUMBER
74HC/HCT7403N
74HC/HCT7403D
PINS
16
16
PACKAGE
PIN POSITION MATERIAL
DIL
SO16L
plastic
plastic
CODE
SOT38Z
SOT162
September 1993
2