TDA8029 Datasheet, PDF (13/58 Pages) NXP Semiconductors – Low power single card reader

Philips Semiconductors
Low power single card reader
Product specification
TDA8029
8.2 Timer 2 operation
Timer 2 is a 16-bit timer and counter which can operate as either an event timer or an event counter, as selected by bit
C/T2 in the special function register T2CON. Timer 2 has three operating modes: capture, auto-reload (up-or down
counting), and baud rate generator, which are selected by bits in register T2CON.
8.2.1 TIMER/COUNTER 2 CONTROL REGISTER (T2CON)
Table 4 Timer/counter 2 control register bits
BIT
Symbol
7
6
5
4
3
2
TF2
EXF2
RCLK
TCLK
EXEN2
TR2
1
C/T2
0
CP/RL2
Table 5 Description of register bits
BIT
7
6
5
4
3
2
1
0
SYMBOL
TF2
EXF2
RCLK
TCLK
EXEN2
TR2
C/T2
CP/RL2
DESCRIPTION
Timer 2 overflow flag. Set by a timer 2 overflow and must be cleared by software. TF2
will not be set when either RCLK = 1 or TCLK = 1.
Timer 2 external flag. Set when either a capture or reload is caused by a negative
transition on controller input T2EX and EXEN2 = 1. When timer 2 interrupt is enabled,
EXF2 = 1 will cause the CPU to vector to the timer 2 interrupt routine. EXF2 must be
cleared by software. EXF2 does not cause an interrupt in up- or down-counter mode
(DCEN = 1).
Receive clock flag. When set, causes the serial port to use timer 2 overflow pulses for
its receive clock in modes 1 and 3. When reset, causes timer 1 overflow to be used for
the receive clock.
Transmit clock flag. When set, causes the serial port to use timer 2 overflow pulses for
its transmit clock in modes 1 and 3. When reset, causes timer 1 overflows to be used for
the transmit clock.
Timer 2 external enable flag. When set, allows a capture or reload to occur as a result
of a negative transition on T2EX if timer 2 is not being used to clock the serial port. When
reset, causes timer 2 to ignore events at T2EX.
Start/stop control for timer 2. TR2 = 1 starts the timer.
Counter or Timer select timer 2. If C/T2 = 0 the internal timer at ¹/₁₂f_XTAL1 is selected;
C/T2 = 1 selects the external event counter (falling edge triggered).
Capture or reload flag. When set, captures will occur on negative transitions at T2EX if
EXEN2 = 1. When reset, auto-reloads will occur either with timer 2 overflows or negative
transitions at T2EX when EXEN2 = 1. When either RCLK = 1 or TCLK = 1, this bit is
ignored and the timer is forced to auto-reload on timer 2 overflow.
Table 6 Timer 2 operating modes
MODE
RCLK AND TCLK
CP/RL2
TR2
16-bit auto-reload
0
0
1
Baud rate generator
1
X
1
Off
X
X
0
2003 Oct 30
13