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PI2EQX5804CNJE Datasheet, PDF (7/23 Pages) Pericom Semiconductor Corporation – 5.0Gbps 4-Lane PCIe® 2.0 ReDriver™ with Equalization & Emphasis
PI2EQX5804C
5.0Gbps 4-Lane PCIe® 2.0 ReDriver™ with
Equalization & Emphasis
The RESET# input is used to reset the receiver detect state machine to its initial state. The start of the receiver detect
cycle starts when RESET# transitions from low to high.
When a Receiver Detect cycle is begins the differential channel pins are enabled with a 2K-Ohm pullup to VDD. A 50-
Ohm Receiver termination will change the pin level. This pin level is evaluated after a fixed time-out, and the channel
is then set into the proper operating state. The output signals RX50_A and RX50_B represent the receiver detect result
for their specific channels.
The I/O Operation table summaries the relationships and operation of receiver detect and other signals involved with
I/O control.
Table 4 - I/O Operation Control
Control Inputs
Detection
States
PD# RXD_x RESET# RX50 SIG_x
0
X
X
X
X
1
0
0
X
X
1
0
1
X
0
1
0
1
1
1
1
1
X
1
0
X
X
1
0
X
1
1
1
1
0
1
1
1
1
1
Data Channel I/O
Input Termination Output Termination Mode
Hi-Z
Hi-Z
Full IC power down, all channels dis-
abled
Hi-Z
2K-Ohm pull-up
Channel disabled, output pulls to VDD.
Receiver detect reset
50-Ohm pull-
down
2K-Ohm pull-up
Channel enabled, no input signal, output
pulls to VDD. Receiver detect disabled
50-Ohm pull-
down
50-Ohm pull-up
Channel enabled, valid input signal
detected, output driving. Receiver detect
disabled.
Hi-Z
2K-Ohm pull-up Channel disabled. Receiver detect reset.
Channel disabled, output pulls to VDD.
Hi-Z
2K-Ohm pull-up Receiver detect enabled, no receiver
detected.
50-Ohm pull-
down
2K-Ohm pull-up
Channel inactive, output pulls to VDD.
Receiver detect enabled, receiver de-
tected. No input signal
50-Ohm pull-
down
50-Ohm pull-up
Channel active, valid input signal de-
tected, output driving. Receiver detect
enabled, load detected.
09-0001
7
PS8926B
06/08/09