AR0135CS Datasheet, PDF (6/27 Pages) ON Semiconductor – 1/3‐inch 1.2 Mp CMOS Digital Image Sensor

AR0135CS
CONFIGURATION AND PINOUT
The figures and tables below show a typical configuration
for the AR0135CS image sensor and show the package
pinouts.
Digital
I/O
Power¹
Digital
Core
Power¹
HiSPi
Power¹
PLL Analog Analog
Power¹ Power¹ Power¹
Master Clock
(6−50 MHz)
From
Controller
V_DD_IO
V_DD V_DD_SLVS V_DD_PLL V_AA V_AA_PIX
EXTCLK
S_DATA
S_CLK
OE_BAR
STANDBY
RESET_BAR
SLVS0_P
SLVS0_N
SLVS1_P
SLVS1_N
SLVS2_P
SLVS2_N
SLVS3_P
SLVS3_N
SLVSC_P
SLVSC_N
TEST
D_GND
FLASH
A_GND
To Controller
V_DD_IO
Digital
Ground
V_DD
V_DD_SLVS
V_DD_PLL
Analog
Ground
V_AA
V_AA_PIX
Notes:
1. All power supplies must be adequately decoupled.
2. ON Semiconductor recommends a resistor value of 1.5 kW, but a greater value may be used for slower two-wire speed.
3. This pull-up resistor is not required if the controller drives a valid logic level on S_CLK at all times.
4. The parallel interface output pads can be left unconnected if the serial output interface is used.
5. ON Semiconductor recommends that 0.1 mF and 10 mF decoupling capacitors for each power supply are mounted as close as possible
to the pad. Actual values and results may vary depending on the layout and design considerations. Refer to the AR0135CS demo
headboard schematics for circuit recommendations.
6. ON Semiconductor recommends that analog power planes are placed in a manner such that coupling with the digital power planes is
minimized.
7. Although 4 serial lanes are shown, the AR0135CS supports only 2- or 3-lane HiSPi.
Figure 5. Serial 4-lane HiSPi Interface
www.onsemi.com
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