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AR0135CS Datasheet, PDF (15/27 Pages) ON Semiconductor – 1/3‐inch 1.2 Mp CMOS Digital Image Sensor
AR0135CS
Table 5. I/O TIMING CHARACTERISTICS, PARALLEL OUTPUT (1.8 V VDD_IO) (Note 1) (continued)
Symbol
Definition
Condition
Min
Typ
Max
Unit
tPFH PIXCLK to FV HIGH
PIXCLK Slew Rate = 6, Data Slew Rate = 7
−2.5
−
2
ns
tPLH PIXCLK to LV HIGH
PIXCLK Slew Rate = 6, Data Slew Rate = 7
−3
−
1.5
ns
tPFL
PIXCLK to FV LOW
PIXCLK Slew Rate = 6, Data Slew Rate = 7
−2.5
−
2
ns
tPLL
PIXCLK to LV LOW
PIXCLK Slew Rate = 6, Data Slew Rate = 7
−3
−
1.5
ns
CIN
Input Pin Capacitance
−
2.5
−
pF
1. Minimum and maximum values are taken at 70°C, 1.7 V and −30°C, 1.95 V. All values are taken at the 50% transition point. The loading used
is 10 pF.
2. Jitter from PIXCLK is already taken into account in the data for all of the output parameters.
Table 6. I/O TIMING CHARACTERISTICS, PARALLEL OUTPUT (2.8 V VDD_IO) (Note 1)
Symbol
Definition
Condition
Min
Typ
Max
Unit
fEXTCLK
tEXTCLK
tR
tF
tjJITTER
tcp
Input Clock Frequency
Input Clock Period
Input Clock Rise Time
Input Clock Fall Time
Input Clock Jitter
EXTCLK to PIXCLK
Propagation Delay
PLL Enabled
PLL Enabled
Nominal Voltages, PLL Disabled,
PIXCLK Slew Rate = 4
6
−
50
MHz
20
−
166
ns
−
3
−
ns
−
3
−
ns
−
−
600
ns
5.3
−
13.4
ns
tRP
PIXCLK Rise Time
tFP
PIXCLK Fall Time
PIXCLK Duty Cycle
PCLK Slew Rate = 6
PCLK Slew Rate = 6
1.3
−
4.0
ns
1.3
−
3.9
ns
40
50
60
%
fPIXCLK PIXCLK Frequency
PIXCLK Slew Rate = 6, Data Slew Rate = 7
6
−
74.25
MHz
tPD
PIXCLK to Data Valid
PIXCLK Slew Rate = 6, Data Slew Rate = 7
−2.5
−
2
ns
tPFH PIXCLK to FV HIGH
PIXCLK Slew Rate = 6, Data Slew Rate = 7
−2.5
−
2
ns
tPLH PIXCLK to LV HIGH
PIXCLK Slew Rate = 6, Data Slew Rate = 7
−2.5
−
2
ns
tPFL
PIXCLK to FV LOW
PIXCLK Slew Rate = 6, Data Slew Rate = 7
−2.5
−
2
ns
tPLL
PIXCLK to LV LOW
PIXCLK Slew Rate = 6, Data Slew Rate = 7
−2.5
−
2
ns
CIN
Input Pin Capacitance
−
2.5
−
pF
1. Minimum and maximum values are taken at 70°C, 2.5 V and −30°C, 3.1 V. All values are taken at the 50% transition point. The loading used
is 10 pF.
2. Jitter from PIXCLK is already taken into account in the data for all of the output parameters.
Table 7. I/O RISE SLEW RATE (2.8 V VDD_IO) (Note 1)
Parallel Slew (R0x306E[15:13])
Condition
Min
Typ
Max
Unit
7
Default
1.50
2.50
3.90
V/ns
6
Default
0.98
1.62
2.52
V/ns
5
Default
0.71
1.12
1.79
V/ns
4
Default
0.52
0.82
1.26
V/ns
3
Default
0.37
0.58
0.88
V/ns
2
Default
0.26
0.40
0.61
V/ns
1
Default
0.17
0.27
0.40
V/ns
0
Default
0.10
0.16
0.23
1. Minimum and maximum values are taken at 70°C, 2.5 V and −30°C, 3.1 V. The loading used is 10 pF.
V/ns
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