AR0135CS Datasheet, PDF (23/27 Pages) ON Semiconductor – 1/3‐inch 1.2 Mp CMOS Digital Image Sensor

AR0135CS
Standby Sequence
Figure 21 and Figure 22 show timing diagrams for
entering and exiting standby. Delays are shown indicating
the last valid register write prior to entering standby as well
as the first valid write upon exiting standby. Also shown is
timing if the EXTCLK is to be disabled during standby.
FV
EXTCLK
SDATA Register Writes Valid
Register Writes Not Valid
STANDBY
750 EXTCLKs
50 EXTCLKs
FV
EXTCLK
SDATA
STANDBY
TRIGGER
Figure 21. Enter Standby Timing
Register Writes Not Valid
10 EXTCLKs
Register Writes Valid
1 ms
28 Rows + CIT
Figure 22. Exit Standby Timing
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