COP888GW Datasheet, PDF (8/44 Pages) National Semiconductor (TI) – 8-Bit Microcontroller with Pulse Train Generators

Data Memory Segment RAM Extension (Continued)
register S is used to extend the base address range (from
0000 to 007F) from XX00 to XX7F where XX represents the
8 bits from the S register Thus the 128-byte data segment
extensions are located from addresses 0100 to 017F for
data segment 1 0200 to 027F for data segment 2 etc up
to FF00 to FF7F for data segment 255 The base address
range from 0000 to 007F represents data segment 0
Figure 4 illustrates how the S register data memory exten-
sion is used in extending the lower half of the base address
range (00 to 7F hex) into 256 data segments of 128 bytes
each with a total addressing range of 32 kbytes from XX00
to XX7F This organization allows a total of 256 data seg-
ments of 128-bytes each with an additional upper base seg-
ment of 128 bytes Furthermore all addressing modes are
availabIe for all data segments The S register must be
changed under program control to move from one data seg-
ment (128 bytes) to another However the upper base seg-
ment (containing the 16 memory registers I O registers
controI registers etc ) is always available regardless of the
contents of the S register since the upper base segment
(address range 0080 to 00FF) is independent of data seg-
ment extension
The instructions that utilize the stack pointer (SP) always
reference the stack as part of the base segment (Segment
0) regardless of the contents of the S register The S regis-
ter is not changed by these instructions Consequently the
stack (used with subroutine linkage and interrupts) is always
located in the base segment The stack pointer will be initial-
ized to point at data memory location 006F as a result of
reset
The 128 bytes of RAM contained in the base segment are
split between the Iower and upper base segments The first
112 bytes of RAM are resident from address 0000 to 006F
in the Iower base segment while the remaining 16 bytes of
RAM represent the 16 data memory registers located at ad-
dresses 00F0 to 00FF of the upper base segment No RAM
is located at the upper sixteen addresses (0070 to 007F) of
the lower base segment
Additional RAM beyond these initial 128 bytes however will
always be memory mapped in groups of 128 bytes (or less)
at the data segment address extensions (XX00 to XX7F) of
the lower base segment The additional 384 bytes of RAM
in this device are memory mapped at address locations
0100 to 017F 0200 to 027F and 0300 to 037F hex
Reads as all ones
FIGURE 4 RAM Organization
TL DD 12065 – 5
http www national com
8