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COP888GW Datasheet, PDF (10/44 Pages) National Semiconductor (TI) – 8-Bit Microcontroller with Pulse Train Generators
Oscillator Circuits (Continued)
Table I shows the component values required for various
standard crystal values
TABLE I CrystaI Oscillator Configuration TA e 25 C
R1 R2 C1
C2
CKI Freq Conditions
(kX) (MX) (pF) (pF)
(MHz)
0
1 30 30–36
10
VCC e 5V
0
1 30 30–36
4
VCC e 5V
0
1 200 100 – 150 0 455 VCC e 5V
Control Registers
CNTRL Register (Address X’00EE)
The Timer1 (T1) and MICROWIRE PLUS control register
contains the following bits
SL1 SL0 Select the MICROWIRE PLUS clock divide by
(00 e 2 01 e 4 1x e 8)
IEDG
External interrupt edge polarity select (0 e Ris-
ing edge 1 e Falling edge)
MSEL
Selects G5 and G4 as MICROWIRE PLUS sig-
nals SK and SO respectively
T1C0
Timer T1 Start Stop control in timer modes
1 and 2
T1 Underflow Interrupt Pending Flag in timer
mode 3
T1C1
Timer T1 mode control bit
T1C2
Timer T1 mode control bit
T1C3
Timer T1 mode control bit
T1C3 T1C2 T1C1 T1C0 MSEL IEDG SL1 SL0
Bit 7
Bit 0
PSW Register (Address X’00EF)
The PSW register contains the following select bits
GIE
GIobaI interrupt enable (enables interrupts)
EXEN EnabIe externaI interrupt
BUSY MICROWIRE PLUS busy shifting flag
EXPND ExternaI interrupt pending
T1ENA Timer T1 Interrupt Enable for Timer Underflow or
T1A Input capture edge
T1PNDA Timer T1 Interrupt Pending Flag (Autoreload RA
in mode 1 T1 Underflow in Mode 2 T1A capture
edge in mode 3)
C
Carry FIag
HC
Half Carry Flag
HC C T1PNDA T1ENA EXPND BUSY EXEN GIE
Bit 7
Bit 0
The Half-Carry fIag is aIso affected by aII the instructions
that affect the Carry fIag The SC (Set Carry) and RC (Reset
Carry) instructions wilI respectiveIy set or clear both the car-
ry flags In addition to the SC and RC instructions ADC
SUBC RRC and RLC instructions affect the Carry and Half
Carry fIags
ICNTRL Register (Address X’00E8)
The ICNTRL register contains the foIlowing bits
T1ENB Timer T1 Interrupt Enable for T1B Input capture
edge
T1PNDB Timer T1 Interrupt Pending Flag for T1B capture
edge
mWEN EnabIe MICROWIRE PLUS interrupt
mWPND MICROWIRE PLUS interrupt pending
T0EN Timer T0 Interrupt Enable (Bit 12 toggle)
T0PND Timer T0 Interrupt pending
LPEN L Port Interrupt Enable (Multi-Input Wake up In-
terrupt)
Bit 7 couId be used as a flag
Unused LPEN T0PND T0EN WPND WEN T1PNDB T1ENB
Bit 7
Bit 0
T2CNTRL Register (Address X’00C6)
The T2CNTRL register contains the following bits
T2ENB Timer T2 Interrupt Enable for T2B Input capture
edge
T2PNDB Timer T2 Interrupt Pending Flag for T2B capture
edge
T2ENA Timer T2 Interrupt Enable for Timer Underflow or
T2A Input capture edge
T2PNDA Timer T2 Interrupt Pending Flag (Auto reload RA
in mode 1 T2 Underflow in mode 2 T2A capture
edge in mode 3)
T2C0
Timer T2 Start Stop control in timer modes 1 and
2 Timer T2 Underflow Interrupt Pending Flag in
timer mode 3
T2C1 Timer T2 mode control bit
T2C2 Timer T2 mode control bit
T2C3 Timer T2 mode control bit
T2C3 T2C2 T2C1 T2C0 T2PNDA T2ENA T2PNDB T2ENB
Bit 7
Bit 0
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