COP888EB Datasheet, PDF (37/75 Pages) National Semiconductor (TI) – 8-Bit CMOS ROM Based Microcontrollers with 8k Memory, CAN Interface, 8-Bit A/D, and USART

Frame Formats (Continued)
FIGURE 29. Resynchronization 1
DS012837-34
DS012837-35
FIGURE 30. Resynchronization 2
Interrupts
The Software trap has the highest priority while the default
VIS has the lowest priority.
INTRODUCTION
Each device supports fourteen vectored interrupts. Interrupt
sources include Timer 0, Timer 1, Timer 2, Timer 3, Port L
Wakeup, Software Trap, MICROWIRE/PLUS, and External
Input.
Each of the 14 maskable inputs has a fixed arbitration rank-
ing and vector.
Figure 31 shows the Interrupt Block Diagram.
All interrupts force a branch to location 00FF Hex in program
memory. The VIS instruction may be used to vector to the
appropriate service routine from location 00FF Hex.
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