COP888EB Datasheet, PDF (34/75 Pages) National Semiconductor (TI) – 8-Bit CMOS ROM Based Microcontrollers with 8k Memory, CAN Interface, 8-Bit A/D, and USART

Frame Formats (Continued)
ORDER OF BIT TRANSMISSION
A frame is transmitted starting with the Start of Frame, se-
quentially followed by the remaining bit fields. In every bit
field the MSB is transmitted first.
FRAME VALIDATION
Frames have a different validation point for transmitters and
receivers. A frame is valid for the transmitter of a message, if
there is no error until the end of the last bit of the End of
Frame field. A frame is valid for a receiver, if there is no error
until and including the end of the penultimate bit of the End
of Frame.
FRAME ARBITRATION AND PRIORITY
Except for an error passive node which transmitted the last
frame, all nodes are allowed to start transmission of a frame
after the intermission, which can lead to two or more nodes
starting transmission at the same time. To prevent a node
from destroying another node’s frame, it monitors the bus
during transmission of the identifier field and the RTR-bit. As
soon as it detects a “dominant” bit while transmitting a “re-
cessive” bit it releases the bus, immediately stops transmis-
sion and starts receiving the frame. This causes no data or
remote frame to be destroyed by another. Therefore the
highest priority message with the identifier 0x000 out of
0x7EF (including the remote data request (RTR) bit) always
gets the bus. This is only valid for standard CAN frame for-
mat. Note that while the CAN specification allows valid stan-
dard identifiers only in the range 0x000 to 0x7EF, the device
will allow identifiers to 0x7FF.
There are three more items that should be taken into consid-
eration to avoid unrecoverable collisions on the bus:
• Within one system each message must be assigned a
unique identifier. This is to prevent bit errors, as one mod-
ule may transmit a “dominant” data bit while the other is
transmitting a “recessive” data bit. This could happen if
two or more modules start transmission of a frame at the
same time and all win arbitration.
• Data frames with a given identifier and a non-zero data
length code may be initiated by one node only. Other-
wise, in worst case, two nodes would count up to the bus-
off state, due to bit errors, if they always start transmitting
the same ID with different data.
• Every remote frame should have a system-wide data
length code (DLC). Otherwise two modules starting
transmission of a remote frame at the same time will
overwrite each other’s DLC which result in bit errors.
ACCEPTANCE FILTERING
Every node may perform acceptance filtering on the identi-
fier of a data or a remote frame to filter out the messages
which are not required by the node. In they way only the data
of frames which match the acceptance filter is stored in the
corresponding data buffers. However, every node which is
not in the bus-off state and has received a correct CRC-
sequence acknowledges each frame.
ERROR MANAGEMENT AND DETECTION
There are multiple mechanisms in the CAN protocol, to de-
tect errors and to inhibit erroneous modules from disabling
all bus activities.
FIGURE 26. Order of Bit Transmission within a CAN Frame
DS012837-31
The following errors can be detected:
• Bit Error
A CAN device that is sending also monitors the bus. If the
monitored bit value is different from the bit value that is sent,
a bit error is detected. The reception of a “dominant” bit in-
stead of a “recessive” bit during the transmission of a pas-
sive error flag, during the stuffed bit stream of the arbitration
field or during the acknowledge slot, is not interpreted as a
bit error.
• Stuff error
A stuff error is detected, if the bit level after 6 consecutive bit
times has not changed in a message field that has to be
coded according to the bit stuffing method.
• Form Error
A form error is detected, if a fixed frame bit (e.g., CRC delim-
iter, ACK delimiter) does not have the specified value. For a
receiver a “dominant” bit during the last bit of End of Frame
does NOT constitute a form error.
• Bit CRC Error
A CRC error is detected if the remainder of the CRC calcula-
tion of a received CRC polynomial is non-zero.
• Acknowledgment Error
An acknowledgment error is detected whenever a transmit-
ting node does not get an acknowledgment from any other
node (i.e., when the transmitter does not receive a “domi-
nant” bit during the ACK frame).
The device can be in one of three states with respect to error
handling:
• Error active
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