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| COP820CJ Datasheet, PDF (25/35 Pages) National Semiconductor (TI) – 8-Bit CMOS ROM Based Microcontrollers with 1k or 2k Memory, Comparator and Brown Out Detector | |||
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Instruction Set
REGISTER AND SYMBOL DEFINITIONS
Registers
A 8-bit Accumulator register
B 8-bit Address register
X 8-bit Address register
SP 8-bit Stack pointer register
PC 15-bit Program counter register
PU upper 7 bits of PC
PL lower 8 bits of PC
C 1-bit of PSW register for carry
HC Half Carry
GIE 1-bit of PSW register for global interrupt enable
INSTRUCTION SET
ADD
ADC
add
add with carry
SUBC
subtract with carry
AND
OR
XOR
IFEQ
IFGT
IFBNE
DRSZ
SBIT
RBIT
IFBIT
X
LD A
LD mem
LD Reg
X
X
LD A
LD A
LD M
CLRA
INCA
DECA
LAID
DCORA
RRCA
SWAPA
SC
RC
IFC
IFNC
JMPL
Logical AND
Logical OR
Logical Exclusive-OR
IF equal
IF greater than
IF B not equal
Decrement Reg. ,skip if zero
Set bit
Reset bit
If bit
Exchange A with memory
Load A with memory
Load Direct memory Immed.
Load Register memory Immed.
Exchange A with memory [B]
Exchange A with memory [X]
Load A with memory [B]
Load A with memory [X]
Load Memory Immediate
Clear A
Increment A
Decrement A
Load A indirect from ROM
DECIMAL CORRECT A
ROTATE A RIGHT THRU C
Swap nibbles of A
Set C
Reset C
If C
If not C
Jump absolute long
Symbols
[B] Memory indirectly addressed by B register
[X] Memory indirectly addressed by X register
Mem Direct address memory or [B]
MemI Direct address memory or [B] or Immediate data
Imm 8-bit Immediate data
Reg Register memory: addresses F0 to FF (Includes B, X
and SP)
Bit Bit number (0 to 7)
â Loaded with
â Exchanged with
A â A + MemI
A â A + MemI + C, C â Carry
HC â Half Carry
A â A + MemI +C, C â Carry
HC â Half Carry
A â A and MemI
A â A or MemI
A â A xor MemI
Compare A and MemI, Do next if A = MemI
Compare A and MemI, Do next if A > MemI
Do next if lower 4 bits of B â Imm
Reg â Reg â 1, skip if Reg goes to 0
1 to bit, Mem (bit= 0 to 7 immediate)
0 to bit, Mem
If bit, Mem is true, do next instr.
A â Mem
A â MemI
Mem â Imm
Reg â Imm
A â [B] (B â B±1)
A â [X] (X â X±1)
A â [B] (B â B±1)
A â [X] (X â X±1)
[B] â Imm (B â B±1)
Aâ0
AâA+1
AâAâ1
A â ROM(PU,A)
A â BCD correction (follows ADC, SUBC)
C â A7 â ⦠â A0 â C
A7 ⦠A4 â A3 ⦠A0
C â 1, HC â 1
C â 0, HC â 0
If C is true, do next instruction
If C is not true, do next instruction
PC â ii (ii = 15 bits, 0 to 32k)
25
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