COP820CJ Datasheet, PDF (19/35 Pages) National Semiconductor (TI) – 8-Bit CMOS ROM Based Microcontrollers with 1k or 2k Memory, Comparator and Brown Out Detector

Modulator/Timer (Continued)
b. Variable Duty Cycle:
When MC3 = 0 and MC2 = 1, a variable duty cycle PWM sig-
nal is generated on the L7 output pin. The counter is clocked
by tC. In this mode the 16-bit timer T1 along with the 8-bit
down counter are used to generate a variable duty cycle
PWM signal. The timer T1 underflow sets MC1 which starts
the down counter and it also sets L7 high (L7 should be con-
figured as an output).When the counter underflows the MC1
control bit is reset and the L7 output will go low until the next
timer T1 underflow. Therefore, the width of the output pulse
is controlled by the 8-bit counter and the pulse duration is
controlled by the 16-bit timer T1 (Figure 15). Timer T1 must
be configured in “PWM Mode/Toggle TIO Out” (CNTRL1 Bits
7,6,5 = 101).
Table 8 shows the different operation modes for the
Modulator/Timer.
TABLE 8. Modulator/Timer Modes
Control Bits in
CNTRL2(00CC)
MC3 MC2 MC1
0
0
0
0
0
1
0
1
X
1
0
X
1
1
X
Operation Mode
L7 Function
Normal I/O
50% Duty Cycle Mode (Clocked by
t_c)
Variable Duty Cycle Mode (Clocked
by t_c) Using Timer 1 Underflow
Modulator Mode (Clocked by t_c)
Modulator Mode (Clocked by CKI)
Note 11: MC1, MC2 and MC3 control bits are cleared upon reset.
Internal Data Bus
DS011208-16
FIGURE 13. Mode 1: Modulator Block Diagram/Output Waveform
DS011208-17
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