COP820CJ Datasheet, PDF (21/35 Pages) National Semiconductor (TI) – 8-Bit CMOS ROM Based Microcontrollers with 1k or 2k Memory, Comparator and Brown Out Detector

Multi-Input Wake Up
The Multi-Input Wakeup feature is used to return
(wakeup) the device from the HALT mode. Figure 16
shows the Multi-Input Wakeup logic.
This feature utilizes the L Port. The user selects which
particular L port bit or combination of L Port bits will cause
the device to exit the HALT mode. Three 8-bit memory
mapped registers, Reg:WKEN, Reg:WKEDG, and Reg-
:WKPND are used in conjunction with the L port to imple-
ment the Multi-Input Wakeup feature.
All three registers Reg:WKEN, Reg:WKPND, and
Reg:WKEDG are read/write registers, and are cleared at
reset, except WKPND. WKPND is unknown on reset.
The user can select whether the trigger condition on the
selected L Port pin is going to be either a positive edge
(low to high transition) or a negative edge (high to low
transition). This selection is made via the Reg:WKEDG,
which is an 8-bit control register with a bit assigned to
each L Port pin. Setting the control bit will select the trig-
ger condition to be a negative edge on that particular L
Port pin. Resetting the bit selects the trigger condition to
be a positive edge. Changing an edge select entails sev-
eral steps in order to avoid a pseudo Wakeup condition as
a result of the edge change. First, the associated WKEN
bit should be reset, followed by the edge select change in
WKEDG. Next, the associated WKPND bit should be
cleared, followed by the associated WKEN bit being
re-enabled.
An example may serve to clarify this procedure. Suppose
we wish to change the edge select from positive (low go-
ing high) to negative (high going low) for L port bit 5,
where bit 5 has previously been enabled for an input. The
program would be as follows:
RBIT 5, WKEN ; Disable MIWU
SBIT 5, WKEDG ; Change edge polarity
RBIT 5, WKPND ; Reset pending flag
SBIT 5, WKEN ; Enable MIWU
If the L port bits have been used as outputs and then
changed to inputs with Multi-Input Wakeup, a safety pro-
cedure should also be followed to avoid inherited pseudo
wakeup conditions. After the selected L port bits have
been changed from output to input but before the associ-
ated WKEN bits are enabled, the associated edge select
bits in WKEDG should be set or reset for the desired edge
selects, followed by the associated WKPND bits being
cleared. This same procedure should be used following
RESET, since the L port inputs are left floating as a result
of RESET.
The occurrence of the selected trigger condition for
Multi-Input Wakeup is latched into a pending register
called Reg:WKPND. The respective bits of the WKPND
register will be set on the occurrence of the selected trig-
ger edge on the corresponding Port L pin. The user has
the responsibility of clearing these pending flags. Since
the Reg:WKPND is a pending register for the occurrence
of selected wakeup conditions, the device will not enter
the HALT mode if any Wakeup bit is both enabled and
pending. Setting the G7 data bit under this condition will
not allow the device to enter the HALT mode. Conse-
quently, the user has the responsibility of clearing the
pending flags before attempting to enter the HALT mode.
If a crystal oscillator is being used, the Wakeup signal will
not start the chip running immediately since crystal oscil-
lators have a finite start up time. The WATCHDOG timer
prescaler generates a fixed delay to ensure that the oscil-
lator has indeed stabilized before allowing the device to
execute instructions. In this case, upon detecting a valid
Wakeup signal only the oscillator circuitry and the
WATCHDOG timer are enabled. The WATCHDOG timer
prescaler is loaded with a value of FF Hex (256 counts)
and is clocked from the t_c instruction cycle clock. The t_c
clock is derived by dividing down the oscillator clock by a
factor of 10. A Schmitt trigger following the CKI on chip in-
verter ensures that the WATCHDOG timer is clocked only
when the oscillator has a sufficiently large amplitude to
meet the Schmitt trigger specs. This Schmitt trigger is not
part of the oscillator closed loop. The startup timeout from
the WATCHDOG timer enables the clock signals to be
routed to the rest of the chip.
DS011208-21
FIGURE 16. Multi-Input Wakeup Logic
INTERRUPTS
The device has a sophisticated interrupt structure to allow
easy interface to the real world. There are three possible
interrupt sources, as shown below.
— A maskable interrupt on external G0 input (positive or
negative edge sensitive under software control)
— A maskable interrupt on timer carry or timer capture
— A non-maskable software/error interrupt on opcode
zero
INTERRUPT CONTROL
The GIE (global interrupt enable) bit enables the interrupt
function. This is used in conjunction with ENI and ENTI to
select one or both of the interrupt sources. This bit is reset
when interrupt is acknowledged.
ENI and ENTI bits select external and timer interrupts re-
spectively. Thus the user can select either or both sources
to interrupt the microcontroller when GIE is enabled.
IEDG selects the external interrupt edge (0 = rising edge,
1 = falling edge). The user can get an interrupt on both ris-
ing and falling edges by toggling the state of IEDG bit after
each interrupt.
IPND and TPND bits signal which interrupt is pending. Af-
ter an interrupt is acknowledged, the user can check these
two bits to determine which interrupt is pending. This per-
mits the interrupts to be prioritized under software. The
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