COP840CJ Datasheet, PDF (24/36 Pages) National Semiconductor (TI) – 8-Bit Microcontrollers with Multi-Input Wake-Up and Brown Out Detector

Addressing Modes (Continued)
DIRECT
The instruction contains an 8-bit address field that directly
points to the data memory for the operand.
IMMEDIATE
The instruction contains an 8-bit immediate field as the oper-
and.
SHORT IMMEDIATE
This addressing mode issued with the LD B,# instruction,
where the immediate # is < 16. The instruction contains a
4-bit immediate field as the operand.
INDIRECT
This addressing mode is used with the LAID instruction. The
contents of the accumulator are used as a partial address
(lower 8 bits of PC) for accessing a data operand from the
program memory.
TRANSFER OF CONTROL ADDRESSING MODES
RELATIVE
This mode is used for the JP instruction with the instruction
field being added to the program counter to produce the next
instruction address. JP has a range from −31 to +32 to allow
a one byte relative jump (JP + 1 is implemented by a NOP in-
struction). There are no “blocks” or “pages” when using JP
since all 15 bits of the PC are used.
ABSOLUTE
This mode is used with the JMP and JSR instructions with
the instruction field of 12 bits replacing the lower 12 bits of
the program counter (PC). This allows jumping to any loca-
tion in the current 4k program memory segment.
ABSOLUTE LONG
This mode is used with the JMPL and JSRL instructions with
the instruction field of 15 bits replacing the entire 15 bits of
the program counter (PC). This allows jumping to any loca-
tion in the entire 32k program memory space.
INDIRECT
This mode is used with the JID instruction. The contents of
the accumulator are used as a partial address (lower 8 bits of
PC) for accessing a location in the program memory. The
contents of this program memory location serves as a partial
address (lower 8 bits of PC) for the jump to the next instruc-
tion.
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