UPD98404 Datasheet, PDF (29/36 Pages) NEC – ADVANCED ATM SONET FRAMER

µPD98404
PMD serial interface (transmit side)
Parameter
Note
REFCLK cycle time
Symbol
tCYRF
Condition
MIN.
TYP.
MAX.
Unit
−20ppm 51.4403 +20ppm
ns
REFCLK high level width
tWRFH
0.4 × tCYRF
0.6 × tCYRF
ns
REFCLK low level width
tWRFL
0.4 × tCYRF
0.6 × tCYRF
ns
TFKT(C) cycle time
tCYSF
−0.005UI 6.43 +0.005UI
ns
Caution To get the TCL clock which is a jitter below 0.01UI, the basis signal which has at least equal to or
more than 40 ppm precision must be inputted.
(i) When using a clock synthesizer
REFCLK
tWRFH
tCYRF
tWRFL
(ii) When using an external serial clock
tCYSF
TFKT (TFKC)
Data Sheet S11822EJ4V0DS00
29