UPD98404 Datasheet, PDF (27/36 Pages) NEC – ADVANCED ATM SONET FRAMER

µPD98404
UTOPIA interface (receive side)
Parameter
RCLK cycle time
RCLK high level width
RCLK low level width
RCLK↑ → RCLAV↑↓ delay time
RCLK↑ → RCLAV output delay time
RCLK↑ → RCLAV data float delay time
RCLK↑ → RDO0-7↑↓ delay time
RCLK↑ → RDO0-7 output delay time
RCLK↑ → RDO0-7 data float delay time
RCLK↑ → RSOC↑↓ delay time
RCLK↑ → RSOC output delay time
RCLK↑ → RSOC data float delay time
RADD0-7 setup time (to RCLK↑)
RADD0-7 hold time (to RCLK↑)
RENBL_B setup time (to RCLK↑)
RENBL_B hold time (to RCLK↑)
Symbol
Condition
MIN.
TYP.
MAX.
Unit
tCYRK
tWRKH
tWRKL
tDCARK
tVCARK
Load capacity = 50 pF
Load capacity = 50 pF
25
0.4 × tCYRK
0.4 × tCYRK
1
1
ns
0.6 × tCYRK
ns
0.6 × tCYRK
ns
19
ns
19
ns
tICARK
Load capacity = 50 pF
1
25
ns
tDDORK
Load capacity = 50 pF
1
19
ns
tVDORK
Load capacity = 50 pF
1
19
ns
tIDORK
Load capacity = 50 pF
1
tDSORK
Load capacity = 50 pF
1
25
ns
19
ns
tVSORK
Load capacity = 50 pF
1
19
ns
tISORK
Load capacity = 50 pF
1
25
ns
tSADRK
4
ns
tHADRK
tSENRK
tHENRK
1
ns
4
ns
1
ns
tWTKH
TCLK
tCYTK
tWTKL
TADD0-7
tSADTK
tHADTK
TCLAV
TENBL_B
TSOC
TDI0-7
tDCATK
tDCATK
tICATK
tSSOTK
tHSOTK
tSDITK
tHDITK
tVCATK
tSENTK
tHENTK
Data Sheet S11822EJ4V0DS00
27