UPD98404 Datasheet, PDF (23/36 Pages) NEC – ADVANCED ATM SONET FRAMER

µPD98404
c) Internal register read/write (NEASCOT-S15 connection mode, MSEL = “0”)
(i) Read timing
Parameter
Symbol
Condition
MIN.
TYP.
MAX.
Unit
Address setup time (to CS_B↓)
tSADCS
10
ns
R/W_B setup time (to CS_B↓)
tSRWCS
10
ns
Address hold time (to CS_B↓)
tHADCSR
5×tCYTK+10
ns
R/W_B hold time (to CS_B↓)
tHRWCSR
15×tCYTK+10
ns
DS_B hold time (to CS_B↓)
tHDSCS
15×tCYTK+10
ns
DS_B↓ → data output delay time
tVDADS Load capacity = 50 pF
30 + tCYTK
ns
DS_B↑ → data float delay time
tIDADS Load capacity = 50 pF
15
45
ns
CS_B pulse width
tWCS
15 × tCYTK
ns
DS_B pulse width
tWDS
4 × tCYTK
ns
Remark tCYTK is the cycle of the TCLK clock.
MADD0 - MADD6
CS_B
tSADCS
tHADCSR
tWCS
MD0 - MD7
DS_B
R/W_B
tSRWCS
tHDSCS
tHRWCSR
Data
tVDADS
tIDADS
tWDS
Data Sheet S11822EJ4V0DS00
23