UPD98404 Datasheet, PDF (15/36 Pages) NEC – ADVANCED ATM SONET FRAMER

µPD98404
1.5 Internal test pins
Pin name Pin No. I/O level
TEST0-
7-9
TEST2
TTL*
I/O
Function
I ^{These pins are used to test the µPD98404. In normal operation, all}
these pins should be grounded.
TEST [2:0] =000
: Normal operation
TEST [2:0] =Other than 000 : Test mode
1.6 Power and ground
Pin name
Pin No.
VDD
1, 27, 36, 60, 73, 95,
108, 119, 129
GND
16, 37, 71, 72, 86, 102,
109, 110, 124, 143, 144
VDD-TPE
39, 45, 49
GND-TPE
42, 46
I/O
Function
- Power supply (+3.3 V ±5%) and ground for the general logic block.
-
- Power supply (+3.3 V ±5%) and ground for output PECL I/O. Any
noise in this power supply will affect the jitter characteristics. A
- ^{means of eliminating this noise, such as a filter, is needed.}
VDD-RPE
GND-RPE
53
50, 56
- Power supply (+3.3 V ±5%) and ground for input PECL I/O. Any
noise in this power supply will affect the jitter characteristics. A
- ^{means of eliminating this noise, such as a filter, is needed.}
VDD-SP
35
GND-SP
38
- Power supply (+3.3 V ±5%) and ground for the serial /parallel block.
Any noise in this power supply will affect the jitter characteristics. A
- ^{means of eliminating this noise, such as a filter, is needed.}
VDD-CS
GND-CS
VDD-CR
GND-CR
32, 33
29, 30, 34
58
57
- Power supply (+3.3 V ±5%) and ground for the clock synthesizer PLL
block. Any noise in this power supply will affect the jitter
characteristics. A means of eliminating this noise, such as a filter, is
-
needed.
- Power supply (+3.3 V ±5%) and ground for the clock recovery PLL
block. Any noise in this power supply will affect the jitter
- ^{characteristics. A means of eliminating this noise, such as a filter, is}
needed.
Data Sheet S11822EJ4V0DS00
15