UPD98404 Datasheet, PDF (14/36 Pages) NEC – ADVANCED ATM SONET FRAMER

µPD98404
Pin name Pin No.
RESET_B 101
I/O level
TTL*
(2/2)
I/O
Function
I ^{System reset signal input. The signal initializes the µPD98404. The}
input signal should be kept low for 1 µs or more. Especially, in case
of the power on, above-mentioned pulse width must be kept after the
supply voltage reaches equal to or more than 90% at least.
When the RESET_B signal is input, the following clock must be input
according to the PMD interface mode.
Serial mode : TCLK/RCLK clock
Parallel mode : TCLK/RCLK and TFC/RPC clocks
1.4 JTAG boundary scan
Pin name Pin No. I/O level
JDI
4
TTL*
JDO
3
TTL*
JCK
2
JMS
5
JRST_B
6
TTL*
TTL*
TTL*
I/O
Function
I Boundary scan data input.
When not being used, this pin should be grounded.
O
(3-
state)
Boundary scan data output.
When not being used, this pin should be left open.
I Boundary scan clock input.
When not being used, this pin should be grounded.
I Boundary scan mode select signal input.
When not being used, this pin should be grounded.
I Boundary scan reset signal input.
When not being used, this pin should be grounded.
Remark
Processing of JTAG boundary scan pins not used (during normal operation)
The reason that the JRST_B pin is grounded when it is not used (during normal operation) is to better
prevent malfunctioning of the JTAG logic. The JTAG pin may be also processed in either of the
following ways:
• Reset the JTAG logic without using the JRST_B pin
Reset the JTAG logic by using the JMS and JCK pins and keep it in the reset status (the JRST_B
pin is pulled up).
Fix the JMS pin to 1 (pull up) and input 5 clock cycles or more to the JCK pin.
• Reset the JTAG logic by using the JRST_B pin
Input a low pulse of the same width as RESET_B of the µPD98404 to the JRST_B pin. If both the
JMS and JRST_B pins are pulled up and kept high, the JTAG logic is not released from the reset
status. Therefore, the normal operation is not affected. Fix the input level of the JDI and JCK pins
by pulling them down or up.
14
Data Sheet S11822EJ4V0DS00