MT40A512M16JY-083E Datasheet, PDF (352/358 Pages) Micron Technology – Automotive DDR4 SDRAM

Table 158: Electrical Characteristics and AC Timing Parameters (Continued)
Parameter
Valid clock requirement after MPSM
entry
Valid clock requirement before MPSM
exit
Exit MPSM to commands not requiring a
locked DLL
Exit MPSM to commands requiring a
locked DLL
CS setup time to CKE
CS_n HIGH hold time to CKE rising edge
CS_n LOW hold time to CKE rising edge
TEN pin HIGH to CS_n LOW – Enter CT
mode
CS_n LOW and valid input to valid output
CK_t, CK_c valid and CKE HIGH after TEN
goes HIGH
ZQCL command: Long POWER-UP and
calibration time
RESET operation
Normal opera-
tion
ZQCS command: Short calibration time
The V_REF increment/decrement step time
Enter V_REFDQ training mode to the first
write or V_REFDQ MRS command delay
Exit V_REFDQ training mode to the first
WRITE command delay
Exit reset from CKE HIGH to a valid com-
mand
RESET_L pulse low after power stable
Symbol
t_CKMPE
DDR4-2666
Min Max
DDR4-2933
DDR4-3200
Min Max Min Max
MIN = ^tMOD (MIN) + ^tCPDED (MIN)
Reserved
Min Max
t_CKMPX
MIN = ^tCK - ^tCKSRX (MIN)
t_XMP
t_{XS (MIN)}
t_XMPDLL
MIN = ^tXMP (MIN) + ^tXSDLL (MIN)
t_{MPX_S}
t_{MPX_HH}
t_{MPX_LH}
t_{CT_Enable}
MIN = ^tIS (MIN) + ^tIH (MIN)
MIN = ^tXP
12 ^tXMP-1 12 ^tXMP-1 12 ^tXMP-1
0ns
0ns
0ns
Connectivity Test Timing
200
–
200
–
200
–
t_{CT_Valid}
–
200
–
200
–
200
t_{CTCKE_Valid 10}
–
10
–
10
–
Calibration and V_REFDQ Train Timing
t_ZQinit
1024
–
1024
–
1024
–
t_ZQoper
512
–
512
–
512
–
t_ZQCS
128
–
128
–
128
–
V_{REF_time}
t_VREFDQE
MIN = 150ns
MIN = 150ns
t_VREFDQX
MIN = 150ns
Initialization and Reset Timing
t_XPR
MIN = greater of 5CK or ^tRFC (MIN) + 10ns
t_{PW_REST_S}
0.1
–
0.1
–
0.1
–
Unit
CK
CK
CK
CK
ns
ns
ns
ns
ns
ns
CK
CK
CK
ns
ns
CK
μs
Notes
1
1
1
1
1
1