MT40A512M16JY-083E Datasheet, PDF (258/358 Pages) Micron Technology – Automotive DDR4 SDRAM

8Gb: x8, x16 Automotive DDR4 SDRAM
Electrical Characteristics – AC and DC Operating Conditions
The voltage levels for setup and hold time measurements are dependent on V_REF. V_REF is
understood as V_REF(DC), as defined in the above figure. This clarifies that DC-variations
of V_REF affect the absolute voltage a signal has to reach to achieve a valid HIGH or LOW
level, and therefore, the time to which setup and hold is measured. System timing and
voltage budgets need to account for V_REF(DC) deviations from the optimum position
within the data-eye of the input signals. This also clarifies that the DRAM setup/hold
specification and derating values need to include time and voltage associated with V_REF
AC-noise. Timing and voltage effects due to AC-noise on V _REF up to the specified limit
(±1% of V_DD) are included in DRAM timings and their associated deratings.
V_REFDQ Supply and Calibration Ranges
The device internally generates its own V_REFDQ. DRAM internal V_REFDQ specification pa-
rameters: voltage range, step size, V_REF step time, V_REF full step time, and V_REF valid level
are used to help provide estimated values for the internal V_REFDQ and are not pass/fail
limits. The voltage operating range specifies the minimum required range for DDR4
SDRAM devices. The minimum range is defined by V _REFDQ,min and V_REFDQ,max. A cali-
bration sequence should be performed by the DRAM controller to adjust V_REFDQ and
optimize the timing and voltage margin of the DRAM data input receivers.
Table 81: V_REFDQ Specification
Parameter
Range 1 V_REFDQ operating points
Range 2 V_REFDQ operating points
V_REF step size
V_REF set tolerance
V_REF step time
V_REF valid tolerance
Symbol
V_REFDQ R1
V_REFDQ R2
V_REF,step
V_{REF,set_tol}
V_REF,time
V_{REF_val_tol}
Min
60%
45%
0.5%
–1.625%
–0.15%
–
–0.15%
Typ
–
–
0.65%
0%
0%
–
0%
Max
92%
77%
0.8%
1.625%
0.15%
150
0.15%
Unit
V_DDQ
V_DDQ
V_DDQ
V_DDQ
V_DDQ
ns
V_DDQ
Notes
1, 2
1, 2
3
4, 5, 6
4, 7, 8
9, 10, 11
12
Notes: 1. V_REF(DC) voltage is referenced to V_DDQ(DC). V_DDQ(DC) is 1.2V.
2. DRAM range 1 or range 2 is set by the MRS6[6]6.
3. V_REF step size increment/decrement range. V_REF at DC level.
4. V_REF,new = V_REF,old ±n × V_REF,step; n = number of steps. If increment, use “+,” if decrement,
use “-.”
5. For n >4, the minimum value of V_REF setting tolerance = V_REF,new - 1.625% × V_DDQ. The
maximum value of V_REF setting tolerance = V_REF,new + 1.625% × V_DDQ.
6. Measured by recording the MIN and MAX values of the V_REF output over the range,
drawing a straight line between those points, and comparing all other V_REF output set-
tings to that line.
7. For n ≤4, the minimum value of V_REF setting tolerance = V_REF,new - 0.15% × V_DDQ. The
maximum value of V_REF setting tolerance = V_REF,new + 0.15% × V_DDQ.
8. Measured by recording the MIN and MAX values of the V_REF output across four consecu-
tive steps (n = 4), drawing a straight line between those points, and comparing all V_REF
output settings to that line.
9. Time from MRS command to increment or decrement one step size for V_REF.
10. Time from MRS command to increment or decrement more than one step size up to the
full range of V_REF.
CCMTD-1406124318-10419
8gb_auto_ddr4_dram.pdf - Rev. C 3/17 EN
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