MT40A512M16JY-083E Datasheet, PDF (150/358 Pages) Micron Technology – Automotive DDR4 SDRAM

8Gb: x8, x16 Automotive DDR4 SDRAM
Power-Down Mode
applied with power-down exit latency, ^tXP, and/or ^tXPDLL after CKE goes HIGH. Power-
down exit latency is defined in the AC Specifications table.
Figure 87: Active Power-Down Entry and Exit
T0
T1
T2
Ta0
Ta1
CK_c
CK_t
Command
Valid
CKE
t_IH
DES
t_IS
DES
t_PD
t_IH
ODT (ODT buffer enabled - MR5 [5] = 0)²
DES
t_IS
Tb0
DES
t_CKE
ODT (ODT buffer disbled - MR5 [5] = 1)³
Tb1
Tc0
DES
Valid
Valid
Valid
t_IS
Address
Valid
t_CPDED
Valid
t_XP
Enter
power-down
mode
Exit
power-down
mode
Time Break
Don’t Care
Notes:
1. Valid commands at T0 are ACT, DES, or PRE with one bank remaining open after comple-
tion of the PRECHARGE command.
2. ODT pin driven to a valid state; MR5[5] = 0 (normal setting).
3. ODT pin driven to a valid state; MR5[5] = 1.
CCMTD-1406124318-10419
8gb_auto_ddr4_dram.pdf - Rev. C 3/17 EN
150
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