MT40A512M16JY-083E Datasheet, PDF (342/358 Pages) Micron Technology – Automotive DDR4 SDRAM

Table 157: Electrical Characteristics and AC Timing Parameters (Continued)
Parameter
Minimum CKE low pulse width for self re-
fresh entry to self refresh exit timing
Minimum CKE low pulse width for self re-
fresh entry to self refresh exit timing
when CA parity is enabled
Valid clocks after self refresh entry (SRE)
or power-down entry (PDE)
Valid clock requirement after self refresh
entry or power-down when CA parity is
enabled
Valid clocks before self refresh exit (SRX)
or power-down exit (PDX), or reset exit
Exit power-down with DLL on to any val-
id command
Exit power-down with DLL on to any val-
id command when CA Parity is enabled.
CKE MIN pulse width
Command pass disable delay
Power-down entry to power-down exit
timing
Begin power-down period prior to CKE
registered HIGH
Power-down entry period: ODT either
synchronous or asynchronous
Power-down exit period: ODT either syn-
chronous or asynchronous
ACTIVATE command to power-down en-
try
PRECHARGE/PRECHARGE ALL command
to power-down entry
REFRESH command to power-down entry
MRS command to power-down entry
Symbol
t_CKESR
t_{CKESR_PAR}
DDR4-1600
Min Max
DDR4-1866
DDR4-2133
Min Max Min Max
MIN = ^tCKE (MIN) + 1nCK
DDR4-2400
Min Max
MIN = ^tCKE (MIN) + 1nCK + PL
t_CKSRE
t_{CKSRE_PAR}
MIN = greater of (5CK, 10ns)
MIN = greater of (5CK, 10ns) + PL
t_CKSRX
MIN = greater of (5CK, 10ns)
Power-Down Timing
t_XP
MIN = greater of 4CK or 6ns
t_{XP _PAR}
MIN = (greater of 4CK or 6ns) + PL
t_{CKE (MIN)}
MIN = greater of 3CK or 5ns
t_CPDED
4
–
4
–
4
–
4
–
t_PD
MIN = ^tCKE (MIN); MAX = 9 × ^tREFI
t_ANPD
WL - 1CK
PDE
Greater of ^tANPD or ^tRFC - REFRESH command to CKE LOW time
PDX
t_{ANPD +} t_XSDLL
Power-Down Entry Minimum Timing
t_ACTPDEN
1
–
1
–
2
–
2
–
t_PRPDEN
1
–
1
–
2
–
2
–
t_REFPDEN
1
–
1
–
2
–
2
–
t_MRSPDEN
MIN = ^tMOD (MIN)
Unit
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
Notes
1
1
1
1
1
1
1
1
1