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N25Q064A13ESF40G Datasheet, PDF (29/81 Pages) Micron Technology – Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase
64Mb, 3V, Multiple I/O Serial Flash Memory
READ REGISTER and WRITE REGISTER Operations
READ REGISTER and WRITE REGISTER Operations
READ STATUS REGISTER or FLAG STATUS REGISTER Command
To initiate a READ STATUS REGISTER command, S# is driven LOW. For extended SPI
protocol, the command code is input on DQ0, and output on DQ1. For dual SPI proto-
col, the command code is input on DQ[1:0], and output on DQ[1:0]. For quad SPI proto-
col, the command code is input on DQ[3:0], and is output on DQ[3:0]. The operation is
terminated by driving S# HIGH at any time during data output.
The status register can be read continuously and at any time, including during a PRO-
GRAM, ERASE, or WRITE operation.
The flag status register can be read continuously and at any time, including during an
ERASE or WRITE operation.
If one of these operations is in progress, checking the write in progress bit or P/E con-
troller bit is recommended before executing the command.
Figure 11: READ REGISTER Command
Extended
0
C
DQ0
DQ1
Command
MSB
High-Z
Dual
0
C
DQ[1:0]
Command
MSB
7
8
LSB
DOUT
MSB
3
4
LSB
DOUT
MSB
9
DOUT
5
DOUT
10
DOUT
6
DOUT
11
12
DOUT
DOUT
7
LSB
DOUT
DOUT
13
14
DOUT
DOUT
15
LSB
DOUT
DOUT
Quad
C
0
1
2
3
DQ[3:0]
Command
MSB
LSB
DOUT
MSB
LSB
DOUT
DOUT
Don’t Care
Notes: 1. Supports all READ REGISTER commands except READ LOCK REGISTER.
2. A READ NONVOLATILE CONFIGURATION REGISTER operation will output data starting
from the least significant byte.
READ NONVOLATILE CONFIGURATION REGISTER Command
To execute a READ NONVOLATILE CONFIGURATION REGISTER command, S# is driv-
en LOW. For extended SPI protocol, the command code is input on DQ0, and output on
DQ1. For dual SPI protocol, the command code is input on DQ[1:0], and output on
PDF: 09005aef845665f4
n25q_64mb_3v_65nm.pdf - Rev. K 08/13 EN
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