N25Q064A13ESF40G Datasheet, PDF (25/81 Pages) Micron Technology – Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase

64Mb, 3V, Multiple I/O Serial Flash Memory
Nonvolatile and Volatile Registers
Table 14: Enhanced Volatile Configuration Register Bit Definitions (Continued)
Note 1 applies to entire table
Bit Name
Settings
2:0 Output driver strength 000 = Reserved
001 = 90 Ohms
010 = 60 Ohms
011 = 45 Ohms
100 = Reserved
101 = 20 Ohms
110 = 15 Ohms
111 = 30 (Default)
Description
Optimizes impedance at V_CC/2 output voltage.
Notes
Notes:
1. Settings determine the device memory configuration upon a change of those settings by
the WRITE ENHANCED VOLATILE CONFIGURATION REGISTER command. The register is
read from or written to in all protocols by READ ENHANCED VOLATILE CONFIGURATION
REGISTER or WRITE ENHANCED VOLATILE CONFIGURATION REGISTER commands, respec-
tively.
2. If bits 6 and 7 are both set to 0, the device operates in quad I/O. When either bit 6 or 7 is
reset to 0, the device operates in dual I/O or quad I/O, respectively, following the next
WRITE ENHANCED VOLATILE CONFIGURATION command.
Flag Status Register
Table 15: Flag Status Register Bit Definitions
Note 1 applies to entire table
Bit Name
Settings
7 Program or
erase
controller
0 = Busy
1 = Ready
6 Erase suspend 0 = Not in effect
1 = In effect
5 Erase
0 = Clear
1 = Failure or protection error
4 Program
0 = Clear
1 = Failure or protection error
3 V_PP
2 Program
suspend
1 Protection
0 = Enabled
1 = Disabled (Default)
0 = Not in effect
1 = In effect
0 = Clear
1 = Failure or protection error
0 Reserved
Reserved
Description
Notes
Status bit: Indicates whether a PROGRAM, ERASE,
2, 3
WRITE STATUS REGISTER, or WRITE NONVOLATILE CON-
FIGURATION command cycle is in progress.
Status bit: Indicates whether an ERASE operation has
3
been or is going to be suspended.
Error bit: Indicates whether an ERASE operation has
4, 5
succeeded or failed.
Error bit: Indicates whether a PROGRAM operation has 4, 5
succeeded or failed. Moreover, indicates an attempt to
program a 0 to a 1 when V_PP = V_PPH and the data pat-
tern is a multiple of 64 bits.
Error bit: Indicates an invalid voltage on V_PP during a
4, 5
PROGRAM or ERASE operation.
Status bit: Indicates whether a PROGRAM operation
3
has been or is going to be suspended.
Error bit: Indicates whether an ERASE or a PROGRAM 4, 5
operation has attempted to modify the protected array
sector. Moreover, indicates whether a PROGRAM opera-
tion has attempted to access the locked OTP space.
Reserved
Notes: 1. Register bits are read by READ FLAG STATUS REGISTER command. All bits are volatile.
PDF: 09005aef845665f4
n25q_64mb_3v_65nm.pdf - Rev. K 08/13 EN
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