PIC16LF1904 Datasheet, PDF (76/288 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology

PIC16LF1904/6/7
7.6.5 PIR2 REGISTER
The PIR2 register contains the interrupt flag bits, as
shown in Register 7-5.
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User software should ensure the
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
REGISTER 7-5: PIR2: PERIPHERAL INTERRUPT REQUEST REGISTER 2
U-0
—
bit 7
U-0
U-0
U-0
U-0
R/W-0/0
U-0
—
—
—
—
LCDIF
—
U-0
—
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-3
bit 2
bit 1-0
Unimplemented: Read as ‘0’
LCDIF: LCD Module Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
Unimplemented: Read as ‘0’
DS41569A-page 76
Preliminary
 2011 Microchip Technology Inc.