PIC16LF876A-I Datasheet, PDF (68/234 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers

PIC16F87XA
8.3.3 SETUP FOR PWM OPERATION
The following steps should be taken when configuring
the CCP module for PWM operation:
1. Set the PWM period by writing to the PR2 register.
2. Set the PWM duty cycle by writing to the
CCPR1L register and CCP1CON<5:4> bits.
3. Make the CCP1 pin an output by clearing the
TRISC<2> bit.
4. Set the TMR2 prescale value and enable Timer2
by writing to T2CON.
5. Configure the CCP1 module for PWM operation.
TABLE 8-3: EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 20 MHz
PWM Frequency
1.22 kHz 4.88 kHz 19.53 kHz 78.12kHz 156.3 kHz
Timer Prescaler (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
16
0xFFh
10
4
0xFFh
10
1
0xFFh
10
1
0x3Fh
8
1
0x1Fh
7
208.3 kHz
1
0x17h
5.5
TABLE 8-4: REGISTERS ASSOCIATED WITH CAPTURE, COMPARE AND TIMER1
Address Name Bit 7 Bit 6 Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on
all other
Resets
0Bh,8Bh, INTCON
10Bh, 18Bh
0Ch
PIR1
GIE PEIE
PSPIF⁽¹⁾ ADIF
TMR0IE
RCIF
INTE
TXIF
RBIE TMR0IF INTF RBIF 0000 000x 0000 000u
SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
0Dh
PIR2
—
—
—
—
—
—
— CCP2IF ---- ---0 ---- ---0
8Ch
PIE1
PSPIE⁽¹⁾ ADIE RCIE
TXIE
SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
8Dh
PIE2
—
—
—
—
—
—
— CCP2IE ---- ---0 ---- ---0
87h
TRISC PORTC Data Direction Register
1111 1111 1111 1111
0Eh
TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
xxxx xxxx uuuu uuuu
0Fh
TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
xxxx xxxx uuuu uuuu
10h
T1CON
—
— T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu
15h
CCPR1L Capture/Compare/PWM Register 1 (LSB)
xxxx xxxx uuuu uuuu
16h
CCPR1H Capture/Compare/PWM Register 1 (MSB)
xxxx xxxx uuuu uuuu
17h
CCP1CON —
— CCP1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000
1Bh
CCPR2L Capture/Compare/PWM Register 2 (LSB)
xxxx xxxx uuuu uuuu
1Ch
CCPR2H Capture/Compare/PWM Register 2 (MSB)
xxxx xxxx uuuu uuuu
1Dh
CCP2CON —
— CCP2X CCP2Y CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 --00 0000
Legend: x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by Capture and Timer1.
Note 1: The PSP is not implemented on 28-pin devices; always maintain these bits clear.
DS39582C-page 68
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