PIC16LF876A-I Datasheet, PDF (163/234 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers

PIC16F87XA
DECFSZ
Decrement f, Skip if 0
Syntax:
Operands:
Operation:
Status Affected:
Description:
[ label ] DECFSZ f,d
0  f  127
d  [0,1]
(f) - 1  (destination);
skip if result = 0
None
The contents of register ‘f’ are
decremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
If the result is ‘1’, the next instruc-
tion is executed. If the result is ‘0’,
then a NOP is executed instead,
making it a 2 TCY instruction.
GOTO
Unconditional Branch
Syntax:
Operands:
Operation:
[ label ] GOTO k
0  k  2047
k  PC<10:0>
PCLATH<4:3>  PC<12:11>
Status Affected:
Description:
None
GOTO is an unconditional branch.
The eleven-bit immediate value is
loaded into PC bits <10:0>. The
upper bits of PC are loaded from
PCLATH<4:3>. GOTO is a
two-cycle instruction.
INCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Increment f
[ label ] INCF f,d
0  f  127
d  [0,1]
(f) + 1  (destination)
Z
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
INCFSZ
Increment f, Skip if 0
Syntax:
Operands:
Operation:
Status Affected:
Description:
[ label ] INCFSZ f,d
0  f  127
d  [0,1]
(f) + 1  (destination),
skip if result = 0
None
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
If the result is ‘1’, the next instruc-
tion is executed. If the result is ‘0’,
a NOP is executed instead, making
it a 2 TCY instruction.
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Inclusive OR Literal with W
[ label ] IORLW k
0  k  255
(W) .OR. k  (W)
Z
The contents of the W register are
OR’ed with the eight-bit literal ‘k’.
The result is placed in the W
register.
IORWF
Inclusive OR W with f
Syntax:
Operands:
Operation:
Status Affected:
Description:
[ label ] IORWF f,d
0  f  127
d  [0,1]
(W) .OR. (f)  (destination)
Z
Inclusive OR the W register with
register ‘f’. If ‘d’ is ‘0’, the result is
placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
 2001-2013 Microchip Technology Inc.
DS39582C-page 163