PIC16LF876A-I Datasheet, PDF (46/234 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers

PIC16F87XA
4.3 PORTC and the TRISC Register
PORTC is an 8-bit wide, bidirectional port. The corre-
sponding data direction register is TRISC. Setting a
TRISC bit (= 1) will make the corresponding PORTC
pin an input (i.e., put the corresponding output driver in
a High-Impedance mode). Clearing a TRISC bit (= 0)
will make the corresponding PORTC pin an output (i.e.,
put the contents of the output latch on the selected pin).
PORTC is multiplexed with several peripheral functions
(Table 4-5). PORTC pins have Schmitt Trigger input
buffers.
When the I²C module is enabled, the PORTC<4:3>
pins can be configured with normal I²C levels, or with
SMBus levels, by using the CKE bit (SSPSTAT<6>).
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an
output, while other peripherals override the TRIS bit to
make a pin an input. Since the TRIS bit override is in
effect while the peripheral is enabled, read-modify-
write instructions (BSF, BCF, XORWF) with TRISC as the
destination, should be avoided. The user should refer
to the corresponding peripheral section for the correct
TRIS bit settings.
FIGURE 4-6:
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE) RC<2:0>,
RC<7:5>
Port/Peripheral Select⁽²⁾
Peripheral Data Out
0
Data Bus
D
Q
WR Port
CK Q
1
Data Latch
WR TRIS
DQ
CK Q
TRIS Latch
RD TRIS
Peripheral
OE⁽³⁾
Q
VDD
P
I/O
pin⁽¹⁾
N
VSS
Schmitt
Trigger
D
EN
RD Port
Peripheral Input
Note 1: I/O pins have diode protection to VDD and VSS.
2: Port/Peripheral Select signal selects between port
data and peripheral output.
3: Peripheral OE (Output Enable) is only activated if
Peripheral Select is active.
FIGURE 4-7:
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE) RC<4:3>
Port/Peripheral Select⁽²⁾
Peripheral Data Out
Data Bus
WR Port
DQ
CK Q
Data Latch
WR TRIS
DQ
CK Q
TRIS Latch
RD TRIS
Peripheral
OE⁽³⁾
RD Port
SSP Input
0
VDD
P
1
I/O
pin⁽¹⁾
N
VSS
Schmitt
Trigger
QD
EN
Schmitt
Trigger
with
SMBus
0 Levels
1
CKE
SSPSTAT<6>
Note
1: I/O pins have diode protection to VDD and VSS.
2: Port/Peripheral Select signal selects between port data
and peripheral output.
3: Peripheral OE (Output Enable) is only activated if
Peripheral Select is active.
DS39582C-page 46
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