PIC16F627A Datasheet, PDF (45/168 Pages) Microchip Technology – FLASH-Based 8-Bit CMOS Microcontrollers

PIC16F627A/628A/648A
TABLE 5-3: PORTB FUNCTIONS
Name
Function Input Type
Output
Type
Description
RB0/INT
RB0
TTL
CMOS Bi-directional I/O port. Can be software programmed for
internal weak pull-up.
RB1/RX/DT
RB2/TX/CK
RB3/CCP1
RB4/PGM
INT
RB1
RX
DT
RB2
TX
CK
RB3
CCP1
RB4
PGM
RB5
RB5
RB6/T1OSO/T1CKI/
PGC
RB7/T1OSI/PGD
RB6
T1OSO
T1CKI
PGC
RB7
T1OSI
PGD
Legend: O = Output
— = Not used
TTL = TTL Input
ST
—
External interrupt.
TTL
CMOS Bi-directional I/O port. Can be software programmed for
internal weak pull-up.
ST
—
USART Receive Pin
ST
CMOS Synchronous data I/O
TTL
CMOS Bi-directional I/O port
—
CMOS USART Transmit Pin
ST
CMOS Synchronous Clock I/O. Can be software programmed
for internal weak pull-up.
TTL
CMOS Bi-directional I/O port. Can be software programmed for
internal weak pull-up.
ST
CMOS Capture/Compare/PWM/I/O
TTL
CMOS Bi-directional I/O port. Interrupt-on-pin change. Can be
software programmed for internal weak pull-up.
ST
—
Low voltage programming input pin. When low voltage
programming is enabled, the interrupt-on-pin change
and weak pull-up resistor are disabled.
TTL
CMOS Bi-directional I/O port. Interrupt-on-pin change. Can be
software programmed for internal weak pull-up.
TTL
CMOS Bi-directional I/O port. Interrupt-on-pin change. Can be
software programmed for internal weak pull-up.
—
XTAL Timer1 Oscillator Output
ST
—
Timer1 Clock Input
ST
—
ICSP Programming Clock
TTL
CMOS Bi-directional I/O port. Interrupt-on-pin change. Can be
software programmed for internal weak pull-up.
XTAL
—
Timer1 Oscillator Input
ST
CMOS ICSP Data I/O
CMOS = CMOS Output
I
= Input
P = Power
ST = Schmitt Trigger Input
OD = Open Drain Output
AN = Analog
TABLE 5-4: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB⁽¹⁾
Address Name Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR
Value on
All Other
RESETS
06h, 106h PORTB RB7
RB6
RB5 RB4⁽²⁾ RB3
RB2
RB1
RB0 xxxx xxxx uuuu uuuu
86h, 186h TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 1111 1111 1111 1111
81h, 181h OPTION RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111
Legend: u = unchanged, x = unknown
Note 1: Shaded bits are not used by PORTB.
2: LVP Configuration Bit sets RB4 functionality.
 2002 Microchip Technology Inc.
Preliminary
DS40044A-page 43