PIC16F627A Datasheet, PDF (40/168 Pages) Microchip Technology – FLASH-Based 8-Bit CMOS Microcontrollers

PIC16F627A/628A/648A
FIGURE 5-10:
RBPU
SPEN
BLOCK DIAGRAM OF
RB2/TX/CK PIN
VDD
Weak
P ^Pull-up
VDD
USART TX/CK Output
1
Data Bus
WR PORTB
DQ
0
CK Q
Data Latch
DQ
RB2/
TX/CK
VSS
WR TRISB
Peripheral OE⁽¹⁾
CK Q
TRIS Latch
RD TRISB
Q
TTL
Input
Buffer
D
EN
RD PORTB
USART Slave Clock In
Schmitt
Trigger
Note 1: Peripheral OE (output enable) is only active if
peripheral select is active.
FIGURE 5-11:
RBPU
CCP1CON
BLOCK DIAGRAM OF
RB3/CCP1 PIN
VDD
Weak
P ^Pull-up
VDD
CCP output
0
Data Bus
WR PORTB
DQ
1
CK Q
Data Latch
DQ
RB3/
CCP1
VSS
WR TRISB
Peripheral OE⁽²⁾
CK Q
TRIS Latch
RD TRISB
Q
TTL
Input
Buffer
D
EN
RD PORTB
CCP In
Schmitt
Trigger
Note 1: Peripheral OE (output enable) is only active if
peripheral select is active.
DS40044A-page 38
Preliminary
 2002 Microchip Technology Inc.