PIC18F6390_07 Datasheet, PDF (405/414 Pages) Microchip Technology – 64/80-Pin Flash Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F6390/6490/8390/8490
Interrupt Sources ............................................................. 281
A/D Conversion Complete ....................................... 235
Capture Complete (CCP) ......................................... 150
Compare Complete (CCP) ....................................... 151
Interrupt-on-Change (RB7:RB4) .............................. 112
INTx Pin ................................................................... 108
PORTB, Interrupt-on-Change .................................. 108
TMR0 ....................................................................... 108
TMR0 Overflow ........................................................ 133
TMR1 Overflow ........................................................ 135
TMR2 to PR2 Match (PWM) .................................... 153
TMR3 Overflow ................................................ 143, 145
Interrupts ............................................................................ 93
Interrupts, Flag Bits
Interrupt-on-Change (RB7:RB4) Flag
(RBIF Bit) ......................................................... 112
INTOSC Frequency Drift .................................................... 34
INTOSC, INTRC. See Internal Oscillator Block.
IORLW ............................................................................. 318
IORWF ............................................................................. 318
IPR Registers ................................................................... 104
L
LCD
Associated Registers ............................................... 279
Bias Types ............................................................... 263
Clock Source Selection ............................................ 262
Configuring the Module ............................................ 278
Frame Frequency ..................................................... 264
Interrupts .................................................................. 276
LCDCON Register ................................................... 258
LCDDATA Register .................................................. 258
LCDPS Register ....................................................... 258
LCDSE Register ....................................................... 258
Multiplex Types ........................................................ 263
Operation During Sleep ........................................... 277
Pixel Control ............................................................. 264
Prescaler .................................................................. 262
Segment Enables ..................................................... 263
Waveform Generation .............................................. 264
LCDCON Register ........................................................... 258
LCDDATA Register .......................................................... 258
LCDPS Register ............................................................... 258
LP3:LP0 Bits ............................................................ 262
LCDSE Register ............................................................... 258
LFSR ................................................................................ 319
Liquid Crystal Display (LCD) Driver ................................. 257
Look-up Tables .................................................................. 68
M
Master Clear (MCLR) ......................................................... 53
Master Synchronous Serial Port (MSSP). See MSSP.
Memory Organization ......................................................... 65
Data Memory ............................................................. 71
Program Memory ....................................................... 65
Memory Programming Requirements .............................. 364
Microchip Internet Web Site ............................................. 409
Migration from Baseline to Enhanced Devices ................ 396
Migration from High-End to Enhanced Devices ............... 397
Migration from Mid-Range to Enhanced Devices ............ 397
MOVF ............................................................................... 319
MOVFF ............................................................................ 320
MOVLB ............................................................................ 320
MOVLW ........................................................................... 321
MOVSF ............................................................................ 339
MOVSS ............................................................................ 340
© 2007 Microchip Technology Inc.
MOVWF ........................................................................... 321
MPLAB ASM30 Assembler, Linker, Librarian .................. 346
MPLAB ICD 2 In-Circuit Debugger .................................. 347
MPLAB ICE 2000 High-Performance
Universal In-Circuit Emulator ................................... 347
MPLAB Integrated Development
Environment Software ............................................. 345
MPLAB PM3 Device Programmer ................................... 347
MPLAB REAL ICE In-Circuit Emulator System ............... 347
MPLINK Object Linker/MPLIB Object Librarian ............... 346
MSSP
ACK Pulse ....................................................... 170, 171
Control Registers (general) ..................................... 157
I²C Mode. See I²C Mode.
Module Overview ..................................................... 157
SPI Master/Slave Connection .................................. 161
SPI Mode. See SPI Mode.
SSPBUF .................................................................. 162
SSPSR .................................................................... 162
MULLW ............................................................................ 322
MULWF ............................................................................ 322
N
NEGF ............................................................................... 323
NOP ................................................................................. 323
O
Opcode Field Descriptions ............................................... 296
Oscillator Configuration ..................................................... 31
EC .............................................................................. 31
ECIO .......................................................................... 31
HS .............................................................................. 31
HSPLL ....................................................................... 31
Internal Oscillator Block ............................................. 34
INTIO1 ....................................................................... 31
INTIO2 ....................................................................... 31
LP .............................................................................. 31
RC ............................................................................. 31
RCIO .......................................................................... 31
XT .............................................................................. 31
Oscillator Selection .......................................................... 281
Oscillator Start-up Timer (OST) ........................... 39, 55, 281
Oscillator Switching ........................................................... 36
Oscillator Transitions ......................................................... 37
Oscillator, Timer1 ..................................................... 135, 145
Oscillator, Timer3 ............................................................. 143
P
Packaging ........................................................................ 389
Details ...................................................................... 390
Marking .................................................................... 389
PICSTART Plus Development Programmer .................... 348
PIE Registers ................................................................... 101
Pin Functions
AVDD .......................................................................... 29
AVDD .......................................................................... 19
AVSS .......................................................................... 29
AVSS .......................................................................... 19
COM0 .................................................................. 17, 25
LCDBIAS1 ........................................................... 17, 25
LCDBIAS2 ........................................................... 17, 25
LCDBIAS3 ........................................................... 17, 25
MCLR/VPP/RG5 ................................................... 12, 20
OSC1/CLKI/RA7 .................................................. 12, 20
OSC2/CLKO/RA6 ................................................ 12, 20
RA0/AN0 .............................................................. 13, 21
DS39629C-page 403