PIC18F6390_07 Datasheet, PDF (371/414 Pages) Microchip Technology – 64/80-Pin Flash Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F6390/6490/8390/8490
26.4.3 TIMING DIAGRAMS AND SPECIFICATIONS
FIGURE 26-5:
EXTERNAL CLOCK TIMING (ALL MODES EXCEPT PLL)
Q4
Q1
Q2
Q3
Q4
Q1
OSC1
CLKO
1
3
3
4
4
2
TABLE 26-6: EXTERNAL CLOCK TIMING REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max Units
Conditions
1A
FOSC
External CLKI Frequency⁽¹⁾
DC
1
MHz XT, RC Oscillator mode
DC
20
MHz HS Oscillator mode
1
2
3
4
Note 1:
Oscillator Frequency⁽¹⁾
DC
31.25 kHz LP Oscillator mode
DC
4
MHz RC Oscillator mode
0.1
4
MHz XT Oscillator mode
4
20
MHz HS Oscillator mode
TOSC
External CLKI Period⁽¹⁾
5
1000
200
kHz LP Oscillator mode
—
ns XT, RC Oscillator mode
50
—
ns HS Oscillator mode
32
—
μs LP Oscillator mode
Oscillator Period⁽¹⁾
250
—
ns RC Oscillator mode
250
1
μs XT Oscillator mode
100
250
ns HS Oscillator mode
50
250
ns HS Oscillator mode
5
TCY
Instruction Cycle Time⁽¹⁾
100
—
μs LP Oscillator mode
—
ns TCY = 4/FOSC
TOSL, External Clock in (OSC1)
30
TOSH
High or Low Time
2.5
—
ns XT Oscillator mode
—
μs LP Oscillator mode
10
—
ns HS Oscillator mode
TOSR, External Clock in (OSC1)
—
TOSF
Rise or Fall Time
—
20
ns XT Oscillator mode
50
ns LP Oscillator mode
—
7.5
ns HS Oscillator mode
Instruction cycle period (TCY) equals four times the input oscillator time base period for all configurations
except PLL. All specified values are based on characterization data for that particular oscillator type under
standard operating conditions with the device executing code. Exceeding these specified limits may result
in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested
to operate at “min.” values with an external clock applied to the OSC1/CLKI pin. When an external clock
input is used, the “max.” cycle time limit is “DC” (no clock) for all devices.
© 2007 Microchip Technology Inc.
DS39629C-page 369