PIC18F6390_07 Datasheet, PDF (149/414 Pages) Microchip Technology – 64/80-Pin Flash Microcontrollers with LCD Driver and nanoWatt Technology

PIC18F6390/6490/8390/8490
14.0 CAPTURE/COMPARE/PWM
(CCP) MODULES
PIC18F6390/6490/8390/8490 devices have two CCP
(Capture/Compare/PWM) modules, designated CCP1
and CCP2. Both modules implement standard capture,
compare and Pulse-Width Modulation (PWM) modes.
Each CCP module contains a 16-bit register which can
operate as a 16-bit Capture register, a 16-bit Compare
register or a PWM Master/Slave Duty Cycle register.
For the sake of clarity, all CCP module operation in the
following sections is described with respect to CCP2,
but is equally applicable to CCP1.
REGISTER 14-1: CCPxCON: CCPx CONTROL REGISTER
U-0
—
bit 7
U-0
R/W-0
R/W-0
R/W-0
—
DCxB1
DCxB0
CCPxM3
R/W-0
CCPxM2
R/W-0
CCPxM1
R/W-0
CCPxM0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5-4
bit 3-0
Unimplemented: Read as ‘0’
DCxB1:DCxB0: PWM Duty Cycle bit 1 and bit 0 for CCPx Module
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two Least Significant bits (bit 1 and bit 0) of the 10-bit PWM duty cycle. The eight Most
Significant bits (DCxB9:DCxB2) of the duty cycle are found in CCPRxL.
CCPxM3:CCPxM0: CCPx Module Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCPx module)
0001 = Reserved
0010 = Compare mode, toggle output on match (CCPxIF bit is set)
0011 = Reserved
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode: initialize CCPx pin low; on compare match, force CCPx pin high (CCPxIF bit is set)
1001 = Compare mode: initialize CCPx pin high; on compare match, force CCPx pin low (CCPxIF bit is set)
1010 = Compare mode: generate software interrupt on compare match (CCPxIF bit is set, CCPx pin
reflects I/O state)
1011 = Compare mode: trigger special event, reset timer, start A/D conversion on CCPx match (CCPxIF
bit is set)⁽¹⁾
11xx = PWM mode
Note 1: CCPxM3:CCPxM0 = 1011 will only reset the timer and not start the A/D conversion on the CCPx match.
© 2007 Microchip Technology Inc.
DS39629C-page 147