PIC24F04KA201 Datasheet, PDF (37/224 Pages) Microchip Technology – 14/20-Pin General Purpose, 16-Bit Flash Microcontrollers with nanoWatt XLP™ Technology

TABLE 4-17: DUAL COMPARATOR REGISTER MAP
File
Name
Addr Bit 15 Bit 14 Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
CMSTAT
CVRCON
CM1CON
CM2CON
Legend:
0630 CMSIDL —
—
—
—
—
C2EVT
0632
—
—
—
—
—
—
—
0634 CON
COE CPOL CLPWR
—
—
CEVT
0636 CON
COE CPOL CLPWR
—
—
CEVT
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
C1EVT
—
COUT
COUT
—
—
CVREN CVROE
EVPOL1 EVPOL0
EVPOL1 EVPOL0
—
CVRR
—
—
—
CVRSS
CREF
CREF
—
CVR3
—
—
Bit 2
—
CVR2
—
—
Bit 1
C2OUT
CVR1
CCH1
CCH1
Bit 0
All
Resets
C1OUT
CVR0
CCH0
CCH0
0000
0000
0000
0000
TABLE 4-18: CLOCK CONTROL REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
RCON
OSCCON
CLKDIV
OSCTUN
REFOCON
HLVDCON
Legend:
Note 1:
2:
0740 TRAPR IOPUWR SBOREN —
—
DPSLP
—
PMSLP EXTR
0742
—
COSC2 COSC1 COSC0
—
NOSC2 NOSC1 NOSC0 CLKLOCK
0744 ROI DOZE2 DOZE1 DOZE0 DOZEN RCDIV2 RCDIV1 RCDIV0
—
0748
—
—
—
—
—
—
—
—
—
074E ROEN
— ROSSLP ROSEL RODIV3 RODIV2 RODIV1 RODIV0
—
0756 HLVDEN —
HLSIDL
—
—
—
—
—
VDIR
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
RCON register Reset values are dependent on type of Reset.
OSCCON register Reset values are dependent on configuration fuses and by type of Reset.
SWR
—
—
—
—
BGVST
SWDTEN
LOCK
—
TUN5
—
IRVST
WDTO
—
—
TUN4
—
—
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
SLEEP IDLE
BOR
POR (Note 1)
CF
— SOSCEN OSWEN (Note 2)
—
—
—
—
3140
TUN3 TUN2 TUN1 TUN0 0000
—
—
—
—
0000
HLVDL3 HLVDL2 HLVDL1 HLVDL0 0000
TABLE 4-19: DEEP SLEEP REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
DSCON
DSWSRC
DSGPR0
DSGPR1
Legend:
Note 1:
0758 DSEN
—
—
—
—
—
075A
—
—
—
—
—
—
075C
075E
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
The Deep Sleep registers are only reset on a VDD POR event.
—
—
—
—
—
DSINT0 DSFLT
—
Deep Sleep General Purpose Register 0
Deep Sleep General Purpose Register 1
Bit 5
—
—
Bit 4
—
DSWDT
Bit 3
—
—
Bit 2
Bit 1
Bit 0
All
Resets⁽¹⁾
—
DSBOR RELEASE
DSMCLR —
DSPOR
0000
0000
0000
0000