PIC24FJ256GB108-I Datasheet, PDF (341/352 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)

PIC24FJ256GB110 FAMILY
APPENDIX A: REVISION HISTORY
Revision A (October 2007)
Original data sheet for the PIC24FJ256GB110 family of
devices.
Revision B (March 2008)
Changes to Section 29.0 “Electrical Characteristics”
and minor edits to text throughout document.
Revision C (December 2009)
Updates all Pin Diagrams to reflect the correct order of
priority for multiplexed peripherals.
Adds packaging information for the new 64-pin QFN
package to Section 30.0 “Packaging Information”
and the Product Information System.
Updates Section 5.0 “Flash Program Memory” with
revised code examples in assembler, and new code
examples in C.
Updates Section 6.2 “Device Reset Times” with
revised information, particularly Table 6-3.
Adds the INTTREG register to Section 4.0 “Mem-
ory Organization” and Section 7.0 “Interrupt
Controller”.
Makes several additions and changes to Section 10.0
“I/O Ports”, including:
• revision of Section 10.4.2.1 “Peripheral Pin
Select Function Priority”
• revisions to Table 10-3, “Selectable Output
Sources”
Makes several changes and additions to Section 18.0
“Universal Serial Bus with On-The-Go Support
(USB OTG)”, including:
• changes the name of the bit U1CON<x> from
RESET to USBRST
• replaces the former Section 18.3 with
Section 18.1 “Hardware Configuration”, includ-
ing an expanded discussion of how to interface
the microcontroller to application in different USB
modes
Updates Section 21.0 “Programmable Cyclic Redun-
dancy Check (CRC) Generator” with new illustrations,
and a revised Section 21.1 “User Interface”.
Updates Section 22.0 “10-Bit High-Speed A/D Con-
verter” by changing all references to AD1CHS0, to
AD1CHS (as well as other locations in the document).
Also revises bit field descriptions in registers,
AD1CON3 (bits 7:0) and AD1CHS (bits 12:8).
Makes minor text edits to bit descriptions in Section 23.0
“Triple Comparator Module” (Register 23-1) and
Section 25.0 “Charge Time Measurement Unit
(CTMU)” (Register 25-1).
Updates Section 26.0 “Special Features” with
revised text on the operation of the regulator during
POR and Standby mode.
Updates Section 26.5 “JTAG Interface” to remove
references to programming via the interface.
Makes multiple additions and changes to Section 29.0
“Electrical Characteristics”, including:
• Addition of IPD specifications for operation at 60°C
• New DC characteristics of VBOR, VBG, TBG and
ICNPD
• Addition of new VPEW specification for VDDCORE
• New AC characteristics for internal oscillator
start-up time (TLPRC)
• Combination of all Internal RC accuracy
information into a single table
Makes other minor typographic corrections throughout
the text.
 2009 Microchip Technology Inc.
DS39897C-page 341