PIC24FJ256GB108-I Datasheet, PDF (216/352 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)

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18.3 USB Interrupts
The USB OTG module has many conditions that can
be configured to cause an interrupt. All interrupt
sources use the same interrupt vector.
Figure 18-9 shows the interrupt logic for the USB
module. There are two layers of interrupt registers in
the USB module. The top level consists of overall USB
status interrupts; these are enabled and flagged in the
U1IE and U1IR registers, respectively. The second
level consists of USB error conditions, which are
enabled and flagged in the U1EIR and U1EIE registers.
An interrupt condition in any of these triggers a USB
Error Interrupt Flag (UERRIF) in the top level.
Interrupts may be used to trap routine events in a USB
transaction. Figure 18-10 provides some common
events within a USB frame and their corresponding
interrupts.
FIGURE 18-9:
USB OTG INTERRUPT FUNNEL
Top Level (USB Status) Interrupts
STALLIF
STALLIE
ATTACHIF
ATTACHIE
RESUMEIF
RESUMEIE
IDLEIF
IDLEIE
Second Level (USB Error) Interrupts
BTSEF
BTSEE
DMAEF
DMAEE
TRNIF
TRNIE
SOFIF
SOFIE
URSTIF (DETACHIF)
URSTIE (DETACHIE)
BTOEF
BTOEE
DFN8EF
DFN8EE
CRC16EF
CRC16EE
CRC5EF (EOFEF)
CRC5EE (EOFEE)
PIDEF
PIDEE
(UERRIF)
UERRIE
IDIF
IDIE
T1MSECIF
TIMSECIE
LSTATEIF
LSTATEIE
ACTVIF
ACTVIE
SESVDIF
SESVDIE
SESENDIF
SESENDIE
Top Level (USB OTG) Interrupts
VBUSVDIF
VBUSVDIE
Set USB1IF
DS39897C-page 216
 2009 Microchip Technology Inc.