PIC24F16KA102_11 Datasheet, PDF (158/278 Pages) Microchip Technology – 20/28-Pin General Purpose, 16-Bit Flash Microcontrollers with nanoWatt XLP Technology

PIC24F16KA102 FAMILY
REGISTER 19-1: RCFGCAL: RTCC CALIBRATION AND CONFIGURATION REGISTER⁽¹⁾ (CONTINUED)
bit 7-0
CAL<7:0>: RTC Drift Calibration bits
01111111 = Maximum positive adjustment; adds 508 RTC clock pulses every one minute
.
.
.
01111111 = Minimum positive adjustment; adds 4 RTC clock pulses every one minute
00000000 = No adjustment
11111111 = Minimum negative adjustment; subtracts 4 RTC clock pulses every one minute
.
.
.
10000000 = Maximum negative adjustment; subtracts 512 RTC clock pulses every one minute
Note 1:
2:
3:
The RCFGCAL register is only affected by a POR.
A write to the RTCEN bit is only allowed when RTCWREN = 1.
This bit is read-only; it is cleared to ‘0’ on a write to the lower half of the MINSEC register.
REGISTER 19-2: PADCFG1: PAD CONFIGURATION CONTROL REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
—
bit 7
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
—
—
SMBUSDEL
OC1TRIS RTSECSEL1⁽¹⁾ RTSECSEL0⁽¹⁾
—
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-5
bit 4-3
bit 2-1
bit 0
Unimplemented: Read as ‘0’
Described in Section 15.0 “Output Compare” and Section 17.0 “Inter-Integrated Circuit (I²C™)”.
RTSECSEL<1:0>: RTCC Seconds Clock Output Select bits⁽¹⁾
11 = Reserved; do not use
10 = RTCC source clock is selected for the RTCC pin (can be LPRC or SOSC, depending on the
RTCOSC (FDS<5>) bit setting)
01 = RTCC seconds clock is selected for the RTCC pin
00 = RTCC alarm pulse is selected for the RTCC pin
Unimplemented: Read as ‘0’
Note 1: To enable the actual RTCC output, the RTCOE (RCFGCAL<10>) bit needs to be set.
DS39927C-page 158
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