KSZ8462HL Datasheet, PDF (274/279 Pages) Micrel Semiconductor – IEEE 1588 Precision Time Protocol-Enabled Two-Port 10/100Mb/s Ethernet Switch with 8 or 16 Bit Host Interface

Micrel, Inc.
KSZ8462HL/KSZ8462FHL
Reset Circuit Guidelines
Figure 27 is the recommended reset circuit for powering up the KSZ8462 device if reset is triggered by the power supply.
Figure 27. Sample Reset Circuit
Figure 28 is the recommended reset circuit for applications where reset is driven by another device (e.g., CPU or FPGA).
At power−on−reset, R, C and D1 provide the necessary ramp rise time to reset the KSZ8462 device. The RST_OUT_N
from CPU/FPGA provides the warm reset after power up.
Figure 28. Recommended Reset Circuit for Interfacing with a CPU/FPGA Reset Output
June 11, 2014
274
Revision 1.0