KSZ8462HL Datasheet, PDF (135/279 Pages) Micrel Semiconductor – IEEE 1588 Precision Time Protocol-Enabled Two-Port 10/100Mb/s Ethernet Switch with 8 or 16 Bit Host Interface

Micrel, Inc.
KSZ8462HL/KSZ8462FHL
Indirect Access Data Registers
Indirect Access Data Register 1 (0x026 – 0x027): IADR1
This register is used to indirectly read or write the data in the Management Information Base (MIB) Counters, Static MAC
Address Table, Dynamic MAC Address Table, or the VLAN Table.
Bit
15−8
7
6−3
2−0
Default
0x00
0
0x0
000
R/W Description
RO Reserved
CPU Read Status
Only for dynamic and statistics counter reads.
RO
1 = Read is still in progress.
0 = Read has completed.
RO Reserved
Indirect Data [66:64]
RO
Bits [66:64] of indirect data.
Indirect Access Data Register 2 (0x028 – 0x029): IADR2
This register is used to indirectly read or write the data in the Management Information Base (MIB) Counters, Static MAC
Address Table, Dynamic MAC Address Table, or the VLAN Table..
Bit
15−0
Default
0x0000
R/W Description
Indirect Data [47:32]
RW
Bits [47:32] of indirect data.
Indirect Access Data Register 3 (0x02A – 0x02B): IADR3
This register is used to indirectly read or write the data in the Management Information Base (MIB) Counters, Static MAC
Address Table, Dynamic MAC Address Table, or the VLAN Table.
Bit
15−0
Default
0x0000
R/W Description
Indirect Data [63:48]
RW
Bits [63:48] of indirect data.
Indirect Access Data Register 4 (0x02C – 0x02D): IADR4
This register is used to indirectly read or write the data in the Management Information Base (MIB) Counters, Static MAC
Address Table, Dynamic MAC Address Table, or the VLAN Table.
Bit
15−0
Default
0x0000
R/W Description
Indirect Data [15:0]
RW
Bits [15:0] of indirect data.
June 11, 2014
135
Revision 1.0